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Reconfiguration controlling apparatus for optically reconfigurable gate array and method thereof

外国特許コード F110005636
整理番号 RX05P24WO
掲載日 2011年9月9日
出願国 アメリカ合衆国
出願番号 31048707
公報番号 20100002551
公報番号 08054670
出願日 平成21年8月27日(2009.8.27)
公報発行日 平成22年1月7日(2010.1.7)
公報発行日 平成23年11月8日(2011.11.8)
国際出願番号 PCT/JP2007/065085
国際公開番号 WO2008/026413
国際出願日 平成19年8月1日(2007.8.1)
国際公開日 平成20年3月6日(2008.3.6)
優先権データ
  • 特願2006-230472 (2006.8.28) JP
  • 特願2006-317363 (2006.11.24) JP
発明の名称 (英語) Reconfiguration controlling apparatus for optically reconfigurable gate array and method thereof
発明の概要(英語) [PROBLEMS] To provide a reconfiguration controller of an optically reconfigurable gate array for correctly and reliably writing various types of logical operation circuits of an optically reconfigurable gate array and performing high-speed logical operation by quickly starting up the circuits. [MEANS FOR SOLVING PROBLEMS] A reconfiguration controller comprises a laser array (1) for producing a laser beam (1a) to serve as a reproducing beam and applying the laser beam (1a), a hologram memory (2) for outputting an optical pattern (2a) when receiving the laser beam (1a) according to pre-stored recording information and outputting a control signal light (2b) relating to optical reconfiguration by the optical pattern (2a), an optically reconfigurable gate array (3) for reconfiguring arrayed logical operation cells into various logical operation circuits according to the outputted optical pattern (2a), and outputting an optical control signal (S3) from the control signal light (2b), and a reproduction light application control means (4) for controlling the application of the laser beam (1a) emitted from the laser array (1) according to the optical control signal. Therefore, optical pattern application can be performed according to the optical control signal at a reconfiguration time adapted to any of various logical operation circuits sequentially reconfigured by the optically reconfigurable gate array. Consequently, correct and reliable write of any one of various types of logical operation circuits can be performed without any write error, and such various types of logical operation circuits can perform logical operation sequentially at high speed.
  • 発明者/出願人(英語)
  • Watanabe, Minoru; Shizuoka [JP]
  • Kobayashi, Fuminori; Fukuoka [JP]
  • Kyushu Institute of Technology, Fukuoka [JP]
  • Japan Science and Technology Agency, Saitama [JP]
国際特許分類(IPC)
米国特許分類/主・副
  • 365/125
  • 365/215
  • 365/112
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