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Metalorganic chemical vapor deposition (mocvd) growth of high performance non-polar iii-nitride optical devices 実績あり

外国特許コード F110005853
整理番号 E06736TW
掲載日 2011年11月2日
出願国 台湾
出願番号 96147275
公報番号 200842931
公報番号 I533351
出願日 平成19年12月11日(2007.12.11)
公報発行日 平成20年11月1日(2008.11.1)
公報発行日 平成28年5月11日(2016.5.11)
優先権データ
  • 60/869,535P (2006.12.11) US
発明の名称 (英語) Metalorganic chemical vapor deposition (mocvd) growth of high performance non-polar iii-nitride optical devices 実績あり
発明の概要(英語) A method of device growth and p-contact processing that produces improved performance for non-polar III-nitride light emitting diodes and laser diodes.
Key components using a low defect density substrate or template, thick quantum wells, a low temperature p-type III-nitride growth technique, and a transparent conducting oxide for the electrodes.
特許請求の範囲(英語) [claim1]
1. A method for fabricating an optoelectronic device, comprising:
(a) growing an n-type Ill-nitride layer on a low defect non-polar Ill-nitride substrate or template; (b) growing an active region including a quantum well structure on the n-type
Ill-nitride layer; and
(c) growing a low temperature p-type Ill-nitride layer on the active region.
[claim2]
2. The method of claim 1, wherein the low defect non-polar Ill-nitride substrate or template is a bulk non-polar Ill-nitride grown by hydride vapor phase epitaxy (HVPE) or an ammonthermal method.
[claim3]
3. The method of claim 1, wherein the low defect non-polar Ill-nitride substrate or template is a non-polar sidewall lateral epitaxial overgrowth (SLEO) template grown by metalorganic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE).
[claim4]
4. The method of claim 1, wherein quantum well structure is grown to be approximately 8 to 12 nanometers thick.
[claim5]
5. The method of claim 1, wherein quantum well structure is grown at temperatures ranging from approximately 845[deg.]C to 890[deg.]C.
[claim6]
6. The method of claim 1, wherein quantum barriers in the quantum well structure are grown to be approximately 10 to 18 nanometers thick.
[claim7]
7. The method of claim 1, wherein quantum barriers in the quantum well structure are grown at temperatures ranging from approximately 915[deg.]C to 940<0>C.
[claim8]
8. The method of claim 1, wherein the low-temperature p-type Ill-nitride layer is grown at a quantum barrier growth temperature.
[claim9]
9. The method of claim 1, further comprising depositing transparent oxide electrodes on the device.
[claim10]
10. The method of claim 9, wherein the electrodes are comprised of indium- tin-oxide (ITO) or zinc oxide (ZnO).
[claim11]
11. An optoelectronic device fabricated using the method of claim 1.
[claim12]
12. An optoelectronic device, comprising:
(a) an n-type Hi-nitride layer grown on a low defect non-polar Ill-nitride substrate or template; (b) an active region including a quantum well structure grown on the n-type
Ill-nitride layer; and
(c) a low temperature p-type Ill-nitride layer grown on the active region.
[claim13]
13. The device of claim 12, wherein the low defect non-polar Ill-nitride substrate or template is a bulk non-polar Ill-nitride grown by hydride vapor phase epitaxy (HVPE) or an ammonthermal method.
[claim14]
14. The device of claim 12, wherein the low defect non-polar Ill-nitride substrate or template is a non-polar sidewall lateral epitaxial overgrowth (SLEO) template grown by metalorganic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE).
[claim15]
15. The device of claim 12, wherein quantum well structure is grown to be approximately 8 to 12 nanometers thick.
[claim16]
16. The device of claim 12, wherein quantum well structure is grown at temperatures ranging from approximately 845[deg.]C to 890[deg.]C.
[claim17]
17. The device of claim 12, wherein quantum barriers in the quantum well structure are grown to be approximately 10 to 18 nanometers thick.
[claim18]
18. The device of claim 12, wherein quantum barriers in the quantum well structure are grown at temperatures ranging from approximately 915[deg.]C to 940[deg.]C.
[claim19]
19. The device of claim 12, wherein the low-temperature p-type Ill-nitride layer is grown at a quantum barrier growth temperature.
[claim20]
20. The device of claim 12, further comprising transparent oxide electrodes deposited on the device.
[claim21]
21. The device of claim 20, wherein the electrodes are comprised of indium- tin-oxide (ITO) or zinc oxide (ZnO).
  • 出願人(英語)
  • UNIVERSITY OF CALIFORNIA
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
  • 発明者(英語)
  • SCHMIDT MATHEW C
  • DIETZ JOCHEN
  • SATO HITOSHI
  • DENBAARS STEVEN P
  • SPECK JAMES S
  • NAKAMURA SHUJI
国際特許分類(IPC)
参考情報 (研究プロジェクト等) ERATO NAKAMURA Inhomogeneous Crystal AREA
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