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SEMICONDUCTOR DEVICE

外国特許コード F110006059
整理番号 S2010-0001
掲載日 2011年12月28日
出願国 世界知的所有権機関(WIPO)
国際出願番号 2010JP067598
国際公開番号 WO 2011/043402
国際出願日 平成22年10月6日(2010.10.6)
国際公開日 平成23年4月14日(2011.4.14)
優先権データ
  • 特願2009-232903 (2009.10.6) JP
発明の名称 (英語) SEMICONDUCTOR DEVICE
発明の概要(英語) Disclosed is a semiconductor device using a vertical MOS transistor wherein source parasitic resistance and a back-bias effect can be ignored. The semiconductor device is provided with at least one vertical MOS transistor (1), and the vertical MOS transistor (1) is provided with: a semiconductor post (2); a source region (3) formed on one end of the semiconductor post (2); a source electrode (4); a drain region (5) formed on the other end of the semiconductor post (2); a drain electrode (6); a gate oxide film (7) disposed so as to surround the side surface of the semiconductor post; a gate electrode (8); and a drain parasitic resistance (15). The drain region (6) is composed of an impurity diffused layer (11) formed on a substrate, and the drain parasitic resistance (15) is formed between the impurity diffused layer (11) and the drain electrode (5). In the vertical MOS transistor (1), there is no back-bias effect of showing an increase of a threshold voltage due to an increase of the absolute value of a substrate bias, said back-bias effect being observed in conventional planar MOS transistors.
  • 出願人(英語)
  • ※2012年7月以前掲載分については米国以外のすべての指定国
  • TOHOKU UNIVERSITY
  • 発明者(英語)
  • SAKUI Koji
  • ENDOH Tetsuo
国際特許分類(IPC)
指定国 AE(UTILITY MODEL),AG,AL(UTILITY MODEL),AM(PROVISIONAL PATENT)(UTILITY MODEL),AO(UTILITY MODEL),AT(UTILITY MODEL),AU,AZ(UTILITY MODEL),BA,BB,BG(UTILITY MODEL),BH(UTILITY MODEL),BR(UTILITY MODEL),BW,BY(UTILITY MODEL),BZ(UTILITY MODEL),CA,CH,CL(UTILITY MODEL),CN(UTILITY MODEL),CO(UTILITY MODEL),CR(UTILITY MODEL),CU(INVENTOR'S CERTIFICATE),CZ(UTILITY MODEL),DE(UTILITY MODEL),DK(UTILITY MODEL),DM,DO(UTILITY MODEL),DZ,EC(UTILITY MODEL),EE(UTILITY MODEL),EG(UTILITY MODEL),ES(UTILITY MODEL),FI(UTILITY MODEL),GB,GD,GE(UTILITY MODEL),GH(UTILITY CERTIFICATE),GM,GT(UTILITY MODEL),HN(UTILITY MODEL),HR(CONSENSUAL PATENT),HU(UTILITY MODEL),ID,IL,IN,IS,JP(UTILITY MODEL),KE(UTILITY MODEL),KG(UTILITY MODEL),KM,KN,KP(INVENTOR'S CERTIFICATE)(UTILITY MODEL),KR(UTILITY MODEL),KZ(PROVISIONAL PATENT)(UTILITY MODEL),LA,LC,LK,LR,LS(UTILITY MODEL),LT,LU,LY,MA,MD(UTILITY MODEL),ME,MG,MK,MN,MW,MX(UTILITY MODEL),MY(UTILITY-INNOVATION),MZ(UTILITY MODEL),NA,NG,NI(UTILITY MODEL),NO,NZ,OM(UTILITY MODEL),PE(UTILITY MODEL),PG,PH(UTILITY MODEL),PL(UTILITY MODEL),PT(UTILITY MODEL),RO,RS(PETTY PATENT),RU(UTILITY MODEL),SC,SD,SE,SG,SK(UTILITY MODEL),SL(UTILITY MODEL),SM,ST,SV(UTILITY MODEL),SY,TH(PETTY PATENT),TJ(UTILITY MODEL),TM(PROVISIONAL PATENT),TN,TR(UTILITY MODEL),TT(UTILITY CERTIFICATE),TZ,UA(UTILITY MODEL),UG(UTILITY CERTIFICATE),US,UZ(UTILITY MODEL),VC(UTILITY CERTIFICATE),VN(PATENT FOR UTILITY SOLUTION),ZA,ZM,ZW,EP(AL,AT,BE,BG,CH,CY,CZ,DE,DK,EE,ES,FI,FR,GB,GR,HR,HU,IE,IS,IT,LT,LU,LV,MC,MK,MT,NL,NO,PL,PT,RO,RS,SE,SI,SK,SM,TR),OA(BF(UTILITY MODEL),BJ(UTILITY MODEL),CF(UTILITY MODEL),CG(UTILITY MODEL),CI(UTILITY MODEL),CM(UTILITY MODEL),GA(UTILITY MODEL),GN(UTILITY MODEL),GQ(UTILITY MODEL),GW(UTILITY MODEL),ML(UTILITY MODEL),MR(UTILITY MODEL),NE(UTILITY MODEL),SN(UTILITY MODEL),TD(UTILITY MODEL),TG(UTILITY MODEL)),AP(BW(UTILITY MODEL),GH(UTILITY MODEL),GM(UTILITY MODEL),KE(UTILITY MODEL),LR(UTILITY MODEL),LS(UTILITY MODEL),MW(UTILITY MODEL),MZ(UTILITY MODEL),NA(UTILITY MODEL),SD(UTILITY MODEL),SL(UTILITY MODEL),SZ(UTILITY MODEL),TZ(UTILITY MODEL),UG(UTILITY MODEL),ZM(UTILITY MODEL),ZW(UTILITY MODEL)),EA(AM,AZ,BY,KG,KZ,MD,RU,TJ,TM)
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