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THIN-FILM SUBSTRATE, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR, DEPOSITION APPARATUS, DEPOSITION METHOD AND GaN TEMPLATE コモンズ

外国特許コード F170008925
掲載日 2017年1月19日
出願国 世界知的所有権機関(WIPO)
国際出願番号 2016JP000895
国際公開番号 WO 2016132746
国際出願日 平成28年2月19日(2016.2.19)
国際公開日 平成28年8月25日(2016.8.25)
優先権データ
  • 特願2015-031708 (2015.2.20) JP
発明の名称 (英語) THIN-FILM SUBSTRATE, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR, DEPOSITION APPARATUS, DEPOSITION METHOD AND GaN TEMPLATE コモンズ
発明の概要(英語) The purpose of the present invention is to provide a thin-film substrate in which a hexagonal crystal buffer layer is formed on a cubic crystal substrate, a semiconductor device, a manufacturing method therefor, a deposition apparatus, a deposition method and a GaN template. This deposition method is a method that deposits a hexagonal crystal thin-film on a cubic crystal substrate. A substrate (110) is a cubic crystal Si (001) substrate. The substrate (110) is disposed on a susceptor (1200) in a chamber (1100). A target (1500) is disposed at a position that is inclined within a range of 10° to 60° with respect to a direction perpendicular to the plate surface of the substrate (110). A hexagonal crystal buffer layer (120) is deposited on the cubic crystal substrate (110) by sputtering without rotating the substrate (110) with respect to the chamber (1100).
特許請求の範囲(英語) [claim1]
1. Baseplate and,
Buffer layer on the aforementioned baseplate and,
In the thin film baseplate which it possesses,
The aforementioned baseplate is the cubic baseplate,
The aforementioned buffer layer is the six directions crystal,
C axis of the aforementioned buffer layer 1st direction is faced in ratio of 50% or more,
As for the aforementioned 1st direction,
It is inclined inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned baseplate
The thin film baseplate which is featured.
[claim2]
2. In claim 1 in the thin film baseplate of statement,
As for the aforementioned cubic baseplate,
Si (001) it is the baseplate,
As for the aforementioned 1st direction,
With rotation direction inside the surface it is inside the range below the 30.deg. [110] direction of the board surface of the aforementioned baseplate or [110] direction and equivalence vis-a-vis direction
The thin film baseplate which is featured.
[claim3]
3. Claim 1 or in claim 2 in the thin film baseplate of statement,
As for the aforementioned buffer layer,
Al [X] Ga [Y] In [Z] N layer (0<=X<=1, 0<=Y<=1, 0<=Z<=1 and X+Y+Z=1) is
The thin film baseplate which is featured.
[claim4]
4. From claim 1 either up to claim 3 in 1 sections in the thin film baseplate of statement,
Possessing center with respect to the aforementioned buffer layer,
The aforementioned center is the six directions crystal
The thin film baseplate which is featured.
[claim5]
5. In claim 4 in the thin film baseplate of statement,
The aforementioned center has super lattice layer
The thin film baseplate which is featured.
[claim6]
6. Baseplate and,
Buffer layer on the aforementioned baseplate and,
III family nitride semiconductor layer with respect to the aforementioned buffer layer and,
In the semiconductor device which it possesses,
The aforementioned baseplate is the cubic baseplate,
The aforementioned buffer layer is the six directions crystal,
C axis of the aforementioned buffer layer 1st direction is faced in ratio of 50% or more,
As for the aforementioned 1st direction,
We are inclined inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned baseplate,
As for c axis of the aforementioned III family nitride semiconductor layer,
It is inclined inside the range below the 5.deg. above the 0.deg. concerning the both of direction and the surface inner split direction which are vertical to the board surface of the aforementioned baseplate, vis-a-vis the aforementioned 1st direction
The semiconductor device which is featured.
[claim7]
7. In claim 6 in the semiconductor device of statement,
As for the aforementioned cubic baseplate,
Si (001) it is the baseplate,
As for the aforementioned 1st direction,
With rotation direction inside the surface it is inside the range below the 30.deg. [110] direction of the board surface of the aforementioned baseplate or [110] direction and equivalence vis-a-vis direction
The semiconductor device which is featured.
[claim8]
8. Claim 6 or in claim 7 in the semiconductor device of statement,
As for the aforementioned buffer layer,
Al [X] Ga [Y] In [Z] N layer (0<=X<=1, 0<=Y<=1, 0<=Z<=1 and X+Y+Z=1) is
The semiconductor device which is featured.
[claim9]
9. From claim 6 either up to claim 8 in 1 sections in the semiconductor device of statement,
With the aforementioned buffer layer and the aforementioned III family nitride semiconductor layer possessing center,
The aforementioned center is the six directions crystal
The semiconductor device which is featured.
[claim10]
10. In claim 9 in the semiconductor device of statement,
The aforementioned center has super lattice layer
The semiconductor device which is featured.
[claim11]
11. Baseplate and,
Buffer layer on the aforementioned baseplate and,
III family nitride semiconductor layer with respect to the aforementioned buffer layer and,
In the GaN templet which it possesses,
The aforementioned baseplate is the cubic baseplate,
The aforementioned buffer layer is the six directions crystal,
C axis of the aforementioned buffer layer 1st direction is faced in ratio of 50% or more,
As for the aforementioned 1st direction,
We are inclined inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned baseplate,
As for c axis of the aforementioned III family nitride semiconductor layer,
It is inclined inside the range below the 5.deg. above the 0.deg. concerning the both of direction and the surface inner split direction which are vertical to the board surface of the aforementioned baseplate, vis-a-vis the aforementioned 1st direction
The GaN templet which is featured.
[claim12]
12. In the production method of the thin film baseplate,
The cubic baseplate is arranged inside the chamber,
The target is arranged in the position where it inclines inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned cubic baseplate,
When relative location with the aforementioned cubic baseplate and the aforementioned target is kept, form the buffer layer of the six directions crystal on the aforementioned cubic baseplate with sputtering
Production method of the thin film baseplate which is featured.
[claim13]
13. In the production method of the semiconductor device,
The cubic baseplate is arranged inside the chamber,
The target is arranged in the position where it inclines inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned cubic baseplate,
When relative location with the aforementioned cubic baseplate and the aforementioned target is kept, buffer layer of the six directions crystal is formed on the aforementioned cubic baseplate with sputtering,
Grow III family nitride semiconductor layer with respect to the aforementioned buffer layer
Production method of the semiconductor device which is featured.
[claim14]
14. The thin film in the membrane method of forming a membrane on the baseplate,
The cubic baseplate is arranged inside the chamber,
The target is arranged in the position where it inclines inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned cubic baseplate,
When relative location with the aforementioned cubic baseplate and the aforementioned target is kept, form the buffer layer of the six directions crystal on the aforementioned cubic baseplate with sputtering
The membrane method of featuring.
[claim15]
15. The baseplate support section in order to support the baseplate and,
The chamber which accommodates the aforementioned baseplate support section and,
In order relatively to become variable inside the range below the 60.deg. above the 10.deg. vis-a-vis the direction which is vertical to the board surface of the aforementioned baseplate, the target arrangement section which is arranged in the position where it inclines and,
Possess
The membrane device which is featured.
  • 出願人(英語)
  • ※2012年7月以前掲載分については米国以外のすべての指定国
  • NAGOYA UNIVERSITY
  • 発明者(英語)
  • AMANO HIROSHI
  • HONDA YOSHIO
  • MITSUNARI TADASHI
国際特許分類(IPC)
指定国 (WO2016132746)
National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JP KE KG KN KP KR KZ LA LC LK LR LS LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN ST TD TG
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