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MAGNETORESISTIVE ELEMENT AND STORAGE CIRCUIT NEW

外国特許コード F170008975
整理番号 AF15-13WO
掲載日 2017年3月13日
出願国 世界知的所有権機関(WIPO)
国際出願番号 2016JP065964
国際公開番号 WO 2016194886
国際出願日 平成28年5月31日(2016.5.31)
国際公開日 平成28年12月8日(2016.12.8)
優先権データ
  • 特願2015-113515 (2015.6.3) JP
発明の名称 (英語) MAGNETORESISTIVE ELEMENT AND STORAGE CIRCUIT NEW
発明の概要(英語) A magnetoresistive element that is provided with: a free layer 10 which is provided with a magnetostrictive layer 11 containing a magnetostrictive material; a pinned layer 18 which is provided with a first ferromagnetic layer 16; a thin film which is arranged between the pinned layer and the free layer; a piezoelectric body 22 which is arranged so as to surround at least a part of the magnetostrictive layer from a direction intersecting with the lamination direction of the free layer and the pinned layer, and which applies a pressure to the magnetostrictive layer; and an electrode 24 which is capable of applying a voltage that is different from the voltage applied to the free layer and the voltage applied to the pinned layer, and which applies a voltage to the piezoelectric body so that the piezoelectric body applies a pressure to the magnetostrictive layer.
特許請求の範囲(英語) [claim1]
1. The free layer which has the magnetostriction layer which includes the magnetostrictive material and,
The pin layer which has 1st ferromagnet layer and,
The thin film which is provided with the aforementioned pin layer and the aforementioned free layer and,
In order to surround at least the portion of the aforementioned magnetostriction layer from the direction which is crossed in lamination direction of the aforementioned free layer and the aforementioned pin layer, the piezoelectric body which is provided, adds pressure to the aforementioned magnetostriction layer and,
The voltage which differs from the voltage which is impressed in the aforementioned free layer and the voltage which is impressed in the aforementioned pin layer being applicable, in order for the aforementioned piezoelectric body to add pressure to the aforementioned magnetostriction layer, the electrode which impresses voltage in the aforementioned piezoelectric body and,
The reluctance element which features that it possesses.
[claim2]
2. The aforementioned electrode, way at least portion of the aforementioned piezoelectric body is surrounded, providing,
As for the aforementioned piezoelectric body, in the direction which from the direction or aforementioned electrode which from the aforementioned magnetostriction layer faces to the aforementioned electrode faces to the aforementioned magnetostriction layer dielectric polarization the reluctance element of the claim 1 statement which features that it does.
[claim3]
3. As for the aforementioned electrode, the 1st electrode which is provided on both sides of the aforementioned lamination direction vis-a-vis the aforementioned piezoelectric body and implication the 2nd electrode,
As for the aforementioned piezoelectric body, in the aforementioned lamination direction dielectric polarization the reluctance element of the claim 1 statement which features that it does.
[claim4]
4. When polarity of the voltage which is impressed in the aforementioned pin layer vis-a-vis the aforementioned free layer reverses, as for polarity of the voltage which is impressed in the aforementioned electrode vis-a-vis the aforementioned free layer the reluctance element of the claim 2 statement which does not change.
[claim5]
5. When polarity of the voltage which is impressed in the aforementioned pin layer vis-a-vis the aforementioned free layer reverses, as for polarity of the voltage which is impressed in the aforementioned 2nd electrode vis-a-vis the aforementioned 1st electrode the reluctance element of the claim 3 statement which does not change.
[claim6]
6. As for the aforementioned free layer, from the claim 1 which features that the 2nd ferromagnet layer which is connected with the aforementioned magnetostriction layer magnetically is had either of 5 the reluctance element of one section statement.
[claim7]
7. From the claim 1 which features that as for the aforementioned magnetostriction layer, axis of easy magnetization direction changes with the impression of pressure, reverses the magnetization direction of the aforementioned free layer either of 6 the reluctance element of one section statement.
[claim8]
8. As for the aforementioned free layer, when the aforementioned axis of easy magnetization direction of the aforementioned magnetostriction layer changes, the reluctance element of the claim 7 statement which features that the aforementioned magnetization direction reverses with spin fill magnetization reversal.
[claim9]
9. As for the aforementioned thin film from the claim 1 which features that tunnel barrier insulating layer or nonmagnetic metal layer is included either of 8 the reluctance element of one section statement.
[claim10]
10. From the claim 1 which features that the aforementioned thin film includes the piezo resistor, as for the aforementioned piezoelectric body adds pressure to the aforementioned piezo resistor either of 8 the reluctance element of one section statement.
[claim11]
11. Reluctance element of claim 9 statement and,
Either the aforementioned free layer and the aforementioned pin layer the bit line which one side is connected and,
The switch which another side of the aforementioned free layer and the aforementioned pin layer is connected and,
The source line which minds another side and the aforementioned switch of the aforementioned free layer and the aforementioned pin layer and is connected and,
The word line where the control terminal which controls the aforementioned switch is connected and,
The control wire where the aforementioned electrode is connected and,
The memory circuit which features that it possesses.
[claim12]
12. Reluctance element of claim 10 statement and,
Either the aforementioned free layer and the aforementioned pin layer the bit line which one side is connected and,
The source line which another side of the aforementioned free layer and the aforementioned pin layer is connected and,
The word line which is connected to the aforementioned electrode and,
The memory circuit which features that it possesses.
[claim13]
13. The free layer which has the magnetostriction layer which includes the magnetostrictive material and,
The pin layer which has 1st ferromagnet layer and,
The thin film which is provided with the aforementioned pin layer and the aforementioned free layer and,
In order to surround at least the portion of the aforementioned magnetostriction layer from the direction which is crossed in lamination direction of the aforementioned free layer and the aforementioned pin layer, the piezoelectric body which is provided, adds pressure to the aforementioned magnetostriction layer and,
The voltage which differs from the voltage which is impressed in the aforementioned free layer and the voltage which is impressed in the aforementioned pin layer being applicable, in order for the aforementioned piezoelectric body to add pressure to the aforementioned magnetostriction layer, the electrode which impresses voltage in the aforementioned piezoelectric body and,
The reluctance element which it has and,
In each case one side either the aforementioned free layer and the aforementioned pin layer the source and the drain which are connected on the one hand and,
It is provided in the aforementioned source and between the drain, the channel where from the aforementioned source the carrier conducts in the aforementioned drain and,
The description above the gate which surrounds at least the portion of the aforementioned channel from the direction which is crossed and, having,
The aforementioned source, the transistor where the aforementioned channel and the aforementioned drain are laminated to the aforementioned lamination direction and,
The memory circuit which features that it possesses.
[claim14]
14. The aforementioned channel is the piezo resistor,
As for the aforementioned gate, the memory circuit of the claim 13 statement which features that it has the piezoelectric body which from the direction which is crossed in conduction direction of the aforementioned carrier adds pressure to the aforementioned channel.
  • 出願人(英語)
  • ※2012年7月以前掲載分については米国以外のすべての指定国
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
  • 発明者(英語)
  • SUGAHARA SATOSHI
  • TAKAMURA YOTA
  • NAKAGAWA SHIGEKI
国際特許分類(IPC)
指定国 (WO2016194886)
National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JP KE KG KN KP KR KZ LA LC LK LR LS LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN ST TD TG
参考情報 (研究プロジェクト等) CREST Research of Innovative Material and Process for Creation of Next-generation Electronics Devices AREA
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