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PROCESSED SUBSTRATE AND SEMICONDUCTOR DEVICE USING SAME

Foreign code F150008187
Posted date 2015年3月23日
Country 世界知的所有権機関(WIPO)
International application number 2014JP000897
International publication number WO 2014136393
Date of international filing 平成26年2月21日(2014.2.21)
Date of international publication 平成26年9月12日(2014.9.12)
Priority data
  • 特願2013-047176 (2013.3.8) JP
Title PROCESSED SUBSTRATE AND SEMICONDUCTOR DEVICE USING SAME
Abstract A processed substrate (11), wherein the principal surface thereof is a c-plane, and a plurality of protrusions (12) disposed so as to constitute a regular triangular grid in plan view are formed on the surface of the substrate. The plurality of protrusions (12) are disposed such that the smallest angle among angles which three sides of a regular triangle in the regular triangular grid constituted by the plurality of protrusions form counterclockwise with the a-axis of GaN when GaN the principal surface of which is a c-plane has been crystal grown on the substrate becomes 10-50°.
  • Applicant
  • ※All designated countries except for US in the data before July 2012
  • YAMAGUCHI UNIVERSITY
  • Inventor
  • OKADA NARIHITO
  • TADATOMO KAZUYUKI
IPC(International Patent Classification)
Specified countries National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JP KE KG KN KP KR KZ LA LC LK LR LS LT LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN TD TG

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