Method for manufacturing thin film transistor
| 外国特許コード | F200010264 |
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| 整理番号 | E086P50US2 |
| 掲載日 | 2020年11月9日 |
| 出願国 | アメリカ合衆国 |
| 出願番号 | 201916550161 |
| 公報番号 | 20190386151 |
| 出願日 | 令和元年8月23日(2019.8.23) |
| 公報発行日 | 令和元年12月19日(2019.12.19) |
| 優先権データ |
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| 発明の名称 （英語） |
Method for manufacturing thin film transistor
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| 発明の概要（英語） | A thin film transistor 100 according to the invention includes a gate electrode 20, a channel 44, and a gate insulating layer 34 provided between the gate electrode 20 and the channel 44 and made of oxide (possibly containing inevitable impurities; this applies to oxide hereinafter) containing lanthanum and zirconium. The channel 44 is made of channel oxide including first oxide containing indium, zinc, and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to indium assumed to be 1 in atomic ratio, second oxide containing indium and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or third oxide containing indium and lanthanum having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio. |
| 従来技術、競合技術の概要（英語） |
BACKGROUND ART Conventionally disclosed is a thin film transistor that includes a gate insulating layer made of a ferroelectric material (e.g. BLT (Bi4-XLaXTi3O12) or PZT (Pb(ZrX, Ti1-X)O3)) in order to enable rapid switching at a low drive voltage. Meanwhile, also disclosed in order to increase carrier density is a thin film transistor that includes a channel made of an oxide conductive material (e.g. indium tin oxide (ITO), zinc oxide (ZnO), or LSCO (LaXSr1-XCuO4)) (Patent Document 1). In a method for manufacturing the thin film transistor mentioned above, a gate electrode of laminated films made of Ti and Pt is formed in accordance with an electron-beam evaporation technique. The gate insulating layer made of BLT or PZT is formed on the gate electrode in accordance with a sol-gel technique. The channel made of ITO is further formed on the gate insulating layer in accordance with a RF-sputtering technique. Subsequently formed on the channel are Ti and Pt serving as a source electrode and a drain electrode in accordance with an electron-beam evaporation technique. An element region is then isolated from a different element region in accordance with a RIE technique and a wet etching technique (using a mixed solution of HF and HCI) (Patent Document 1). The inventors of this application have studied selection and combination of oxide that appropriately exhibits functions as a thin film transistor (Patent Document 2). |
| 特許請求の範囲（英語） |
[claim1] 1.-7. (canceled) [claim2] 8. A method for manufacturing a thin film transistor, comprising: a gate insulating layer forming step of forming a gate insulating layer made of oxide (possibly including inevitable impurities) containing lanthanum (La) and zirconium (Zr) by heating, in an atmosphere containing oxygen, a gate insulating layer precursor layer obtained from a gate insulating layer precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing zirconium (Zr) as solutes, the gate insulating layer being in contact with a gate electrode layer, the gate insulating layer forming step being performed between a step of forming the gate electrode layer and a step of forming a channel by forming channel oxide (possibly including inevitable impurities), the step of forming the channel including heating, in an atmosphere containing oxygen, a channel precursor layer obtained from, as a start material, a first precursor solution including, as solutes, a precursor containing indium (In), a precursor containing zinc (Zn), and a precursor containing zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to the indium (In) assumed to be 1 in atomic ratio, a second precursor solution including, as solutes, a precursor containing indium (In) and a precursor containing zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or a third precursor solution including, as solutes, a precursor containing indium (In) and a precursor containing lanthanum (La) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, to form the channel oxide including first oxide (possibly including inevitable impurities) containing indium (In), zinc (Zn), and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to the indium (In) assumed to be 1 in atomic ratio, second oxide (possibly including inevitable impurities) containing indium (In) and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or third oxide (possibly including inevitable impurities) containing indium (In) and lanthanum (La) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio. [claim3] 9. The method for manufacturing the thin film transistor according to claim 8, wherein the gate insulating layer is formed by heating at a heating temperature of 350° C. or more and 550° C. or less, and the channel is formed by heating at a heating temperature of 350° C. or more and 550° C. or less. [claim4] 10. The method for manufacturing the thin film transistor according to claim 8, wherein the channel oxide includes the first oxide and has an amorphous phase. [claim5] 11. The method for manufacturing the thin film transistor according to claim 8, wherein the channel oxide includes the second oxide and has an amorphous phase. [claim6] 12. The method for manufacturing the thin film transistor according to claim 8, wherein the channel oxide includes the third oxide and has an amorphous phase. [claim7] 13. The method for manufacturing the thin film transistor according to claim 8, wherein the gate insulating layer forming step further includes before formation of the gate insulating layer, an imprinting step of imprinting the gate insulating layer precursor layer heated at a temperature of 80° C. or more and 300° C. or less in an atmosphere containing oxygen to allow the gate insulating layer precursor layer to have an imprinted structure. [claim8] 14. The method for manufacturing the thin film transistor according to according to claim 8, wherein the step of forming the channel further includes before formation of the channel, the imprinting step of imprinting the channel precursor layer heated at a temperature of 80° C. or more and 300° C. or less in an atmosphere containing oxygen to allow the channel precursor layer to have an imprinted structure. [claim9] 15.-16. (canceled) [claim10] 17. A method for manufacturing a thin film transistor, comprising the gate insulating layer forming step of forming a gate insulating layer made of oxide (possibly including inevitable impurities) containing lanthanum (La) and zirconium (Zr) by heating, in an atmosphere containing oxygen, a gate insulating layer precursor layer obtained from a gate insulating layer precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing zirconium (Zr) as solutes, the gate insulating layer being in contact with a gate electrode layer, the gate insulating layer forming step being performed between the step of forming the gate electrode layer and the step of forming the channel by forming channel oxide (possibly including inevitable impurities), the step of forming the channel including heating, in an atmosphere containing oxygen, a channel precursor layer obtained from, as a start material, a fourth precursor solution including, as solutes, a precursor containing indium (In), a precursor containing zinc (Zn), and a precursor containing tin (Sn), or a fifth precursor solution including, as solutes, a precursor containing indium (In) and a precursor containing zinc (Zn), to form the channel oxide including fourth oxide containing indium (In), zinc (Zn), and tin (Sn), or fifth oxide containing indium (In) and zinc (Zn). [claim11] 18. The method for manufacturing the thin film transistor according to claim 17, wherein the zinc (Zn) in the fourth oxide has atomicity of 0.15 or more and 0.75 or less relative to atomicity of the indium assumed to be 1, and the tin (Sn) has atomicity of 0.5 or more and 2 or less relative to atomicity of the indium assumed to be 1. [claim12] 19. The method for manufacturing the thin film transistor according to claim 17, wherein the gate insulating layer is formed by heating at a heating temperature of 350° C. or more and 440° C. or less, and the channel is formed by heating at a heating temperature of 350° C. or more and 440° C. or less. [claim13] 20. The method for manufacturing the thin film transistor according to claim 17, wherein the step of forming the gate electrode layer further includes the imprinting step of imprinting a gate electrode precursor layer heated at a temperature of 80° C. or more and 300° C. or less in an atmosphere containing oxygen to allow the gate electrode precursor layer to have an imprinted structure, before formation of gate electrode oxide (possibly including inevitable impurities) by heating, in an atmosphere containing oxygen, a gate electrode precursor layer obtained from a gate electrode precursor solution as a start material including, as solutes, a precursor containing bismuth (Bi) and a precursor containing ruthenium (Ru), or a gate electrode precursor layer obtained from a gate electrode precursor solution as a start material including, as solutes, a precursor containing lanthanum (La), a precursor containing bismuth (Bi), and a precursor containing ruthenium (Ru), wherein the gate electrode oxide (possibly including inevitable impurities) contains the bismuth (Bi) and the ruthenium (Ru) or contains the lanthanum (La), the bismuth (Bi), and the ruthenium (Ru). [claim14] 21. The method for manufacturing the thin film transistor according to claim 17, wherein the gate insulating layer forming step further includes before formation of the gate insulating layer, the imprinting step of imprinting the gate insulating layer precursor layer heated at a temperature of 80° C. or more and 300° C. or less in an atmosphere containing oxygen to allow the gate insulating layer precursor layer to have an imprinted structure. [claim15] 22. The method for manufacturing the thin film transistor according to claim 17, wherein the step of forming the channel further includes before formation of the channel, the imprinting step of imprinting the channel precursor layer heated at a temperature of 80° C. or more and 300° C. or less in an atmosphere containing oxygen to allow the channel precursor layer to have an imprinted structure. |
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| 国際特許分類(IPC) |
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| 参考情報 （研究プロジェクト等） | ERATO SHIMODA Nano-Liquid Process AREA |
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