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Method for manufacturing thin film transistor with oxide semiconductor channel

Foreign code F200010264
File No. E086P50US2
Posted date Nov 9, 2020
Country United States of America
Application number 201916550161
Gazette No. 20190386151
Gazette No. 10847657
Date of filing Aug 23, 2019
Gazette Date Dec 19, 2019
Gazette Date Nov 24, 2020
Priority data
  • P2012-068133 (Mar 23, 2012) JP
  • 201615352560 (Nov 15, 2016) US
  • 201414386811 (Sep 21, 2014) US
  • 2013JP57621 (Mar 18, 2013) WO
Title Method for manufacturing thin film transistor with oxide semiconductor channel
Abstract A thin film transistor 100 according to the invention includes a gate electrode 20, a channel 44, and a gate insulating layer 34 provided between the gate electrode 20 and the channel 44 and made of oxide (possibly containing inevitable impurities; this applies to oxide hereinafter) containing lanthanum and zirconium. The channel 44 is made of channel oxide including first oxide containing indium, zinc, and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to indium assumed to be 1 in atomic ratio, second oxide containing indium and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or third oxide containing indium and lanthanum having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio.
Outline of related art and contending technology BACKGROUND ART
Conventionally disclosed is a thin film transistor that includes a gate insulating layer made of a ferroelectric material (e.g. BLT (Bi4-XLaXTi3O12) or PZT (Pb(ZrX, Ti1-X)O3)) in order to enable rapid switching at a low drive voltage. Meanwhile, also disclosed in order to increase carrier density is a thin film transistor that includes a channel made of an oxide conductive material (e.g. indium tin oxide (ITO), zinc oxide (ZnO), or LSCO (LaXSr1-XCuO4)) (Patent Document 1).
In a method for manufacturing the thin film transistor mentioned above, a gate electrode of laminated films made of Ti and Pt is formed in accordance with an electron-beam evaporation technique. The gate insulating layer made of BLT or PZT is formed on the gate electrode in accordance with a sol-gel technique. The channel made of ITO is further formed on the gate insulating layer in accordance with a RF-sputtering technique. Subsequently formed on the channel are Ti and Pt serving as a source electrode and a drain electrode in accordance with an electron-beam evaporation technique. An element region is then isolated from a different element region in accordance with a RIE technique and a wet etching technique (using a mixed solution of HF and HCI) (Patent Document 1). The inventors of this application have studied selection and combination of oxide that appropriately exhibits functions as a thin film transistor (Patent Document 2).
Scope of claims [claim1]
1. A method for manufacturing a thin film transistor, comprising:
a gate insulating layer forming step of forming a gate insulating layer made of oxide comprising: lanthanum (La) and zirconium (Zr) by heating, in an atmosphere containing oxygen, a gate insulating layer precursor layer obtained from a gate insulating layer precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing zirconium (Zr) as solutes, the gate insulating layer being in contact with a gate electrode layer,
the gate insulating layer forming step being performed between a step of forming the gate electrode layer and a step of forming a channel by forming channel oxide,
the step of forming the channel including
heating, in an atmosphere containing oxygen, a channel precursor layer obtained from, as a start material, one of:
(1) a first precursor solution including, as solutes, a precursor containing indium (In), a precursor containing zinc (Zn), and a precursor containing zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to the indium (In) assumed to be 1 in atomic ratio, or
(2) a second precursor solution including, as solutes, a precursor containing indium (In) and a precursor containing zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or
(3) a third precursor solution including, as solutes, a precursor containing indium (In) and a precursor containing lanthanum (La) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio,
to form the channel oxide including one of:
(1) a first oxide comprising indium (In), zinc (Zn), and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to the indium (In) assumed to be 1 in atomic ratio, or
(2) a second oxide comprising indium (In) and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or
(3) a third oxide comprising indium (In) and lanthanum (La) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio.

[claim2]
2. The method for manufacturing the thin film transistor according to claim 1, wherein
the gate insulating layer is formed by heating at a heating temperature of 350° C. or more and 550° C. or less, and
the channel is formed by heating at a heating temperature of 350° C. or more and 550° C. or less.

[claim3]
3. The method for manufacturing the thin film transistor according to claim 1, wherein
the channel oxide includes the first oxide and has an amorphous phase.
  • Inventor, and Inventor/Applicant
  • INOUE SATOSHI
  • LI JINWANG
  • MIYASAKO TAKAAKI
  • PHAN TUE TRONG
  • SHIMODA TATSUYA
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) ERATO SHIMODA Nano-Liquid Process AREA
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