Compound semiconductor and a manufacturing method thereof
|Posted date||Jan 29, 2021|
|Country||Republic of Korea|
|Date of filing||Jun 1, 2018|
|Gazette Date||Feb 12, 2020|
|International application number||JP2018021122|
|International publication number||WO2018221711|
|Date of international filing||Jun 1, 2018|
|Date of international publication||Dec 6, 2018|
|Title||Compound semiconductor and a manufacturing method thereof|
A nitride compound semiconductor having a low resistivity that is conventionally difficult to be manufactured is provided. Since the nitride compound semiconductor exhibits a high electron mobility, a high-performance semiconductor device may be configured. The present invention may provide, at a high productivity, a group 13 nitride semiconductor of an n-type conductivity that may be formed as a film on a substrate having a large area size and has a mobility of 70 to 140 cm2/(V·s) by a pulsed sputtering method performed in a process atmosphere at room temperature to 700° C.
(From US2020357888 A1)
|Outline of related art and contending technology||
GaN InN such as group 13 or a device using a nitride semiconductor is widely put into practical use thereof. Conventionally, group III nitride semiconductor crystals 13 grow in such, a method in which the method is used and MOCVD MBE below. However, the method comprises more than 1000°C MOCVD requires the processing temperature. MBE method is a compound semiconductor film can be formed at low temperature but, in the film formation area is limited in the production cost is increased or not be suitable for mass production.
In addition, for the method MBE, heavily donor is added, the crystal structure of the vicinity of the conduction band in the forbidden band due to absorption by the high concentration donor level is generated. Therefore, the transparency of the compound semiconductor film is reduced due to the problems (non Patent literature 1). From such a viewpoint, the production of a compound semiconductor, the nitride semiconductor is mainly a practical production, and others are also used to MOCVD (non Patent literature 1).
Currently, high pressure resistance low on-resistance characteristic of the next generation of electronic device which has been demanded. For this purpose, a binary 2, binary or ternary compound semiconductor 3 4, more specifically, a group III nitride semiconductor is used for 13 realization of a compound semiconductor device has been demanded. For this purpose, crystals of higher quality than the doping technique of adding (elaboration) after standing still is required. In particular, formed on a substrate in a vertical furnace GaN (縱 mold) in a power device, and a reduction of the carbon concentration of the N-type drift layer, the electron mobility can be improved urgently. The following literature in the prior art may be adopted.
Patent document 1 includes, on a copper substrate comprising a metal nitride on the buffer layer, a semiconductor device having a semiconductor layer is disclosed.
In Patent document 2, has a thickness of 10-100 m and a microprocessor, and a sintered polymer, having flexibility and heat resistance of the graphite substrate provided on the buffer layer and HfN, GaN buffer layer provided on a semiconductor substrate having a semiconductor layer made of an embodiment of the disclosed invention. In addition, patent document 3 includes, on a substrate and the compound of group ZnO III field V epitaxially growing a semiconductor manufacturing method is disclosed.
Patent document 4 and patent document 5 is, in a nitride semiconductor or, as described in paragraph 0167 herein after called object.
In addition, patent document 6 is, in the later patent application (PCT/JP2017/020513 of the applicant) PCT international survey of the prior art cited in the report. The concentration may be increased up to 2x10E+20/cm3 Si, AlGaN roughness does not appear in the experimental results (Fig. 4) is disclosed.
Next, the non patent document 1 is formed using a n MOCVD GaN type semiconductor property of the investigation is disclosed. Non Patent literature 2 discloses a contact resistance of the P type semiconductor layer GaN studies of achievements have been disclosed. Non Patent literature 3 discloses, as a base of the element p InGaN GaN LED PSD grown at a low temperature method of the type produced in that the results of the study are disclosed. Non Patent literature 4 includes, in the silicon doping concentration and the electron mobility has been disclosed with respect to the achievement of the study.
Non Patent literature 5 includes, in the GaN carrier mobility for a model of the results of study is disclosed. Non Patent literature 6 discloses, PSD P GaN formed in the contact resistance with respect to the type of an evaluation of the results of study has been disclosed. Non Patent literature 7 includes, formed on a glass an experimental example LED is disclosed. Non Patent literature 8 discloses, by using a method of growing PSD nitride single crystal in which a study is disclosed. Non Patent literature 9 discloses an extremely low resistance at the time when the normally-off type transistor is disclosed GaN Ge doping.
Non Patent literature 10 includes, in the resistance of the high carrier concentration of the doping study achievement Si AlGaN disclosed. Non Patent literature 11 discloses, a concentration of 2x10 Si20 cm-3 mobility at 1034cm2/(V, S) is disclosed in the experimental example. Non Patent literature 12 includes, in the method of doping PSD Ge GaN for epitaxial growth of film is disclosed.
Non Patent literature 13 includes, with new physical properties of the doped Ge Si capable of providing N type is disclosed in detail with respect to my character GaN the present invention.
Finally, in non patent document 14, by a sputtering method as in the formation of high quality nitride semiconductor device applications has been reported in studies of achievement.
|Scope of claims||
1. 13 Is a group III element and nitrogen B, Al, In Ga selected from the group consisting or an element 2 containing a binary, ternary or quaternary compound semiconductor of 4 3, and resistivity of a combination of two electron concentration with respect to the property values, (a) an electron concentration 1. 8X1020 cm-3, also, has a specific resistance of 0. 25X10-3 Ω, cm, 3 (b) an electron concentration. 6X1020 cm-3, also, has a specific resistance of 0. 25X10-3 Ω, cm, (c) an electron concentration 6x1020 cm-3, also, has a specific resistance of 0. 15X10-3 Ω, cm, and, (d) an electron concentration 3x1020 cm-3, also, has a specific resistance of 0. 15X10-3 Ω, surrounded cm 4 of a point satisfying the condition that the value of the compound semiconductor.
2. Method according to claim 1, has a specific resistance of 0. 190X10-3 Ω, is not more cm
3. Method according to claim 1, a compound semiconductor containing Si.
4. 1 the first method, method according to claim 2 or 3, surface roughness measurement drawing by AFM obtained RMS value is 1. Is not more 5nm.
5. The first 1, second 2 device, the first 3 device, or method according to claim 4, and N type conductivity, an electron mobility of 80cm2 / (V, S) or compound semiconductor.
6. Method according to any one of claims 1-5, and an electron mobility of N type conductivity, an electron mobility of 130cm2 / (V, S) is not more.
7. Method according to any one of claims 1-6, N Ga based compound semiconductor and
8. Method according to any one of claims 1-7, as a group III element and the 13 Ga, and/or further contains Al In compound semiconductor.
9. Method according to any one of claims 1-8, containing Ge compound semiconductor.
10. Any one of claims 1-9 compound semiconductor is used as electrode is connected to the conductive portion of the first contact structure.
11. The semiconductor device according to claim 10 contact structure.
12. According to any one of claims 1-9 compound semiconductor is used as the transparent electrode.
13. 13 Is a group III element and nitrogen B, Al, Ga selected from the group consisting or In one element of a binary 2, binary 3 or binary 4 and a method of manufacturing a compound semiconductor, a rare gas, nitrogen gas, an atmosphere containing oxygen and processes, including at least metal Ga target sputtered in the chamber in a pulse, a growth rate less than or equal to 450nm/h by, 0. 4X10-3 Ω, a compound having a resistivity below about cm forming a semiconductor thin film compound semiconductor manufacturing method.
14. Claim 13 the first method for manufacturing a compound semiconductor, the substrate temperature in deposition of the compound semiconductor is not less than 700°C for producing.
15. A method of manufacturing the compound semiconductor of claim 13 or 14, setting the growth rate of a compound semiconductor to 90 field 450nm/H method.
16. 13 the first apparatus, as described in claim 14 or 15 manufacturing method of a compound semiconductor, a compound for supplying an oxygen gas in the environment in a semiconductor manufacturing method
17. Any one of claims 13-16 compound semiconductor manufactured by the method of claim, without supplying oxygen gas into the chamber and, as a residual component of the oxygen contained in the chamber component, or, in the target metal or other raw material gas including an oxygen content of the trace and sputtering is performed using a method of manufacturing a compound semiconductor.
18. Any one of claims 13-17 described in the production method of a compound semiconductor, a metal compound forming a semiconductor thin film surface and the distance between the target set of compound semiconductor are 10 field 50cm manufacturing method.
19. Any one of claims claims 13-18 production method of a compound semiconductor capable of being sputtered turan, turndown sputtering a target metal and provided at a head portion, the head portion is assembled to the substrate electrode and the chamber to oppose each other, the effective size of about 1-inch size of the head portion ∼ 4-inch size spur touch.
20. 19 the sputtering method on the turn of the first claim, planar circular or rectangular metal target composed of a head portion configured to mount to a thickness of the touch.
|IPC(International Patent Classification)||
Contact Information for " Compound semiconductor and a manufacturing method thereof "
- Japan Science and Technology Agency Department of Intellectual Property Management
- URL: http://www.jst.go.jp/chizai/
- Address: 5-3, Yonbancho, Chiyoda-ku, Tokyo, Japan , 102-8666
- Fax: 81-3-5214-8417