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Point contact array, not circuit, and electronic circuit using the same

Foreign code F110003110
File No. A041-39US3
Posted date Jun 9, 2011
Country United States of America
Application number 16503705
Gazette No. 20050243844
Gazette No. 7525410
Date of filing Jun 24, 2005
Gazette Date Nov 3, 2005
Gazette Date Apr 28, 2009
International application number JP2001009464
International publication number WO2002037572
Date of international filing Oct 29, 2001
Date of international publication May 10, 2002
Priority data
  • P2000-334686 (Nov 1, 2000) JP
  • P2001-138103 (May 9, 2001) JP
  • 2001WO-JP09464 (Oct 29, 2001) WO
  • 2003US-10363259 (Mar 7, 2003) US
Title Point contact array, not circuit, and electronic circuit using the same
Abstract (US7525410)
There are provided a point contact array, in which a plurality of point contacts are arranged, each point contact electrically and reversibly controlling conductance between electrodes and being applicable to an arithmetic circuit, a logic circuit, and a memory device, a NOT circuit, and an electronic circuit using the same.
A circuit includes a plurality of point contacts each composed of a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance.
The conductance of each point contact is controlled to realize the circuit.
Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material.
When a semiconductor or insulator material is interposed between the electrodes, a crystal or an amorphous material of GeSx, GeSex, GeTex, or WOx (0<x<100) is preferably used as the semiconductor or insulator material.
A NOT circuit is realized using a device which includes an atomic switch serving as a two-terminal device, the device including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance, and capable of controlling conductance between the electrodes.
Scope of claims [claim1]
1. An electric circuit comprising: a plurality of atomic switches, each atomic switch including a first electrode made of a compound conductive material which is Ag2S, Ag2Se, Cu2S, or Cu2Se, including mobile ions, and having ionic conductivity and electric conductivity, anda second electrode made of a conductive substance configured to control conductance between the first and second electrodes, and to be spaced apart from the first electrode, wherein the mobile ions can form a bridge between the first and second electrodesat least one NOT circuit, each NOT circuit including one of the plurality of atomic switches, anda resistor and a capacitor, each of which serves as a two-terminal device;
at least one AND circuit configured to use one of the plurality of the atomic switches;
and
an OR circuit configured to use one of the plurality of the atomic switches.
[claim2]
2. The electric circuit according to claim 1, wherein the at least one NOT circuit includes a diode in addition to the resistor and the capacitor.
[claim3]
3. The electric circuit according to claim 2, wherein a voltage to be applied to one of the plurality of atomic switches, used by the at least one NOT circuit, to control the conductance between the electrodes of the one of the plurality of atomic switches used by the at least one NOT circuit, is controlled through the capacitor.
[claim4]
4. The electric circuit according to claim 1, wherein the at least one AND circuit includes a first AND circuit configured to use one of the plurality of atomic switches, the one of the plurality of atomic switches used by the first AND circuit being connected to a first NOT circuit comprised in the at least one NOT circuit, wherein the first NOT circuit is connected to a first input terminal;
a second AND circuit configured to use one of the plurality of atomic switches, the one of the plurality of atomic switches used by the second AND circuit being connected to a second NOT circuit comprised in the at least one NOT circuit, wherein the second NOT circuit is connected to a second input terminal;
and
a third AND circuit configured to use one of the plurality of atomic switches, wherein the one of the plurality of atomic switches used by the third AND circuit is configured to include a second output terminal, and to be connected to the first and second input terminals;
and
the OR circuit is configured to use one of the plurality of atomic switches, wherein the one of the plurality of atomic switches used by the OR circuit is configured to include a first output terminal, the first output terminal being connected to each output of the first and second AND circuits.
  • Inventor, and Inventor/Applicant
  • AONO MASAKAZU
  • HASEGAWA TSUYOSHI
  • TERABE KAZUYA
  • NAKAYAMA TOMONOBU
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) CREST Quantum Effects and Related Physical Phenomena AREA
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