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N-type transistor, production methods for n-type transistor and n-type transistor-use channel, and production method of nanotube structure exhibiting n-type semiconductor-like characteristics

Foreign code F110003367
File No. A242-50WO
Posted date Jun 23, 2011
Country United States of America
Application number 81587106
Gazette No. 20090008629
Gazette No. 7902089
Date of filing Feb 10, 2006
Gazette Date Jan 8, 2009
Gazette Date Mar 8, 2011
International application number JP2006302349
International publication number WO2006085611
Date of international filing Feb 10, 2006
Date of international publication Aug 17, 2006
Priority data
  • P2005-034476 (Feb 10, 2005) JP
  • 2006WO-JP302349 (Feb 10, 2006) WO
Title N-type transistor, production methods for n-type transistor and n-type transistor-use channel, and production method of nanotube structure exhibiting n-type semiconductor-like characteristics
Abstract (US7902089)
An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties.
To realize this, a film of a nitrogenous compound 6 is formed directly on a channel 5 of a transistor 1 comprising a source electrode 2, a drain electrode 3, a gate electrode 4 and the n-type channel 5 having a nanotube-shaped structure and provided between the source electrode 2 and the drain electrode 3.
Scope of claims [claim1]
1. A method for manufacturing a channel for an n-type transistor, wherein the method comprises: forming a film of a nitrogenous compound directly on a nanotube-shaped structure exhibiting p-type semiconductive properties using a thermal CVD technique, at a temperature of said nanotube-shaped structure of 500 deg. C. or higher and 1600 deg. C. or lower; and
changing a nanotube-shaped structure exhibiting p-type semiconductive properties to said nanotube-shaped structure exhibiting n-type semiconductive properties.
[claim2]
2. The method for manufacturing a channel for an n-type transistor according to claim 1, wherein said forming said film of the nitrogenous compound is performed under normal pressure.
[claim3]
3. The method for manufacturing a channel for an n-type transistor according to claim 1, wherein said forming said film of the nitrogenous compound is performed in an atmosphere of oxygen concentration of 1 volume % or less.
[claim4]
4. The method for manufacturing a channel for an n-type transistor according to claim 1, wherein said forming said film of the nitrogenous compound is performed in a reducing atmosphere.
[claim5]
5. A method for manufacturing a nanotube-shaped structure exhibiting n-type semiconductive properties, wherein the method comprises: forming a film of a nitrogenous compound directly on a nanotube-shaped structure exhibiting p-type semiconductive properties using a thermal CVD technique, at a temperature of said nanotube-shaped structure of 500 deg. C. or higher and 1600 deg. C. or lower; and
changing a nanotube-shaped structure exhibiting p-type semiconductive properties to said nanotube-shaped structure exhibiting n-type semiconductive properties.
[claim6]
6. The method for manufacturing a nanotube-shaped structure exhibiting the n-type semiconductive properties according to claim 5, wherein said forming the film of the nitrogenous compound is performed under normal pressure.
[claim7]
7. The method for manufacturing the nanotube-shaped structure exhibiting the n-type semiconductive properties according to claim 5, wherein said forming said film of the nitrogenous compound is performed in an atmosphere of oxygen concentration of 1 volume % or less.
[claim8]
8. The method for manufacturing the nanotube-shaped structure exhibiting the n-type semiconductive properties according to claim 5, wherein said forming said film of the nitrogenous compound is performed in a reducing atmosphere.
  • Inventor, and Inventor/Applicant
  • MATSUMOTO KAZUHIKO
  • KOJIMA ATSUHIKO
  • NAGAO SATORU
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) CREST Creation of Nanodevices and System Based on New Physical Phenomena and Functional Principles AREA
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