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Amorphous oxide and thin film transistor 実績あり

外国特許コード F110003744
整理番号 E06015US3
掲載日 2011年7月4日
出願国 アメリカ合衆国
出願番号 98496011
公報番号 20110101352
公報番号 9269826
出願日 平成23年1月5日(2011.1.5)
公報発行日 平成23年5月5日(2011.5.5)
公報発行日 平成28年2月23日(2016.2.23)
国際出願番号 JP2005003273
国際公開番号 WO2005088726
国際出願日 平成17年2月28日(2005.2.28)
国際公開日 平成17年9月22日(2005.9.22)
  • 特願2004-071477 (2004.3.12) JP
  • 特願2004-325938 (2004.11.10) JP
  • 10/592,431 (2005.2.28) US
  • 2005JP003273 (2005.2.28) WO
発明の名称 (英語) Amorphous oxide and thin film transistor 実績あり
発明の概要(英語) The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide.
In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018/cm3, and a thin film transistor using such an amorphous oxide.
In a thin film transistor having a source electrode 6, a drain electrode 5, a gate electrode 4, a gate insulating film 3, and a channel layer 2, an amorphous oxide having an electron carrier concentration less than 1018/cm3 is used in the channel layer 2.
従来技術、競合技術の概要(英語) BACKGROUND ART
A thin film transistor (TFT) is a three-terminal element having a gate terminal, a source terminal, and a drain terminal.
It is an active element in which a semiconductor thin film deposited on a substrate is used as a channel layer for transportation of electrons or holes and a voltage is applied to the gate terminal to control the current flowing in the channel layer and switch the current between the source terminal and the drain terminal.
Currently, the most widely used TFTs are metal-insulator-semiconductor field effect transistors (MIS-FETs) in which the channel layer is composed of a polysilicon or amorphous silicon film.
Recently, development of TFTs in which ZnO-based transparent conductive oxide polycrystalline thin films are used as the channel layers has been actively pursued (Patent Document 1).
These thin films can be formed at low temperatures and is transparent in visible light; thus, flexible, transparent TFTs can be formed on substrates such as plastic boards and films.
However, known ZnO rarely forms a stable amorphous phase at room temperature and mostly exhibits polycrystalline phase; therefore, the electron mobility cannot be increased because of the diffusion at the interfaces of polycrystalline grains.
Moreover, ZnO tends to contain oxygen defects and a large number of carrier electrons, and it is thus difficult to decrease the electrical conductivity.
Therefore, it has been difficult to increase the on/off ratio of the transistors.
Patent Document 2 discloses an amorphous oxide represented by ZnxMyInzO(x+3y/2+3z/2) (wherein M is at least one element selected from Al and Ga, the ratio x/y is in the range of 0.2 to 12, and the ratio z/y is in the range of 0.4 to 1.4).
However, the electron carrier concentration of the amorphous oxide film obtained herein is 1018/cm3 or more.
Although this is sufficient for regular transparent electrodes, the film cannot be easily applied to a channel layer of a TFT.
This is because it has been found that a TFT having a channel layer composed of this amorphous oxide film does not exhibit a sufficient on/off ratio and is thus unsuitable for TFT of a normally off type.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2003-298062
Patent Document 2: Japanese Unexamined Patent Application Publication No. 2000-044236

特許請求の範囲(英語) [claim1]
1. A thin film transistor device comprising: a drain electrode;
a source electrode;
a channel layer contacting the drain electrode and the source electrode, wherein the channel layer is formed of an amorphous InxSn1-xOxide (0.8 <= x <= 0.9) consisting of SnO2 in the presence of In2O3 as a host oxide, further the channel layer is prepared by a sputtering method or a pulsed laser deposition method using a In2O3 -- SnO2 polycrystalline sinter as a target in an atmosphere containing oxygen gas, and
the channel layer having a transparent, semi-insulating property represented by the electron mobility is more than 1 cm2/(V.sec) and the electron carrier concentration is 1018/cm3 or less as measured by Hall-effect measurement at room temperature;
a gate electrode; and
a gate insulating film positioned between the gate electrode and the channel.
  • 発明者/出願人(英語)
  • 257/57
  • 257/E29.273
参考情報 (研究プロジェクト等) ERATO HOSONO Transparent ElectroActive Materials AREA