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Metalorganic chemical vapor deposition (MOCVD) growth of high performance non-polar III-nitride optical devices achieved

Foreign code F110003784
File No. E06736US1
Posted date Jul 4, 2011
Country United States of America
Application number 00128607
Gazette No. 20080164489
Gazette No. 7842527
Date of filing Dec 11, 2007
Gazette Date Jul 10, 2008
Gazette Date Nov 30, 2010
Priority data
  • 60/869,535P (Dec 11, 2006) US
Title Metalorganic chemical vapor deposition (MOCVD) growth of high performance non-polar III-nitride optical devices achieved
Abstract A method of device growth and p-contact processing that produces improved performance for non-polar III-nitride light emitting diodes and laser diodes.
Key components using a low defect density substrate or template, thick quantum wells, a low temperature p-type III-nitride growth technique, and a transparent conducting oxide for the electrodes.
Outline of related art and contending technology BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is related to the growth of semiconductor devices on non-polar III-nitride films, more specifically, LEDs (light emitting diodes), LDs (laser diodes), VCSELs (vertical cavity surface emitting lasers), RCLEDs (resonant cavity LEDs), and MCLEDs (micro-cavity LEDs).
2. Description of the Related Art
(Note: This application references a number of different publications as indicated throughout the specification as indicated by the citation within brackets, i.e., [REF x], wherein x is a number.
A list of these different publications identified by the number x can be found below in the section entitled "References." Each of these publications is incorporated by reference herein.)
Conventional III-nitride optical devices, such as gallium nitride (GaN) LEDs, are grown in the c-direction of the wurtzite unit cell.
A net polarization occurs from contributions of spontaneous and piezoelectric polarizations in the direction of film growth.
The resulting built-in electric field causes the band structure to be slanted, most notably in the quantum wells.
This has a huge impact on the behavior of c-plane GaN optical devices.
The slanted quantum wells consequently diminish the spatial overlap of the hole and electron wavefunctions, in turn decreasing radiative recombination efficiency.
In addition, the emission wavelength decreases (blue shift) with increasing drive current as explained by the Quantum Confined Stark Effect (QCSE) [REF 1].
M-plane and a-plane GaN are defined as non-polar GaN because there is no net polarization field normal to those respective planes.
Therefore, the band structure is not slanted like c-plane, which means quantum well structures on these planes have flat bands.
Radiative efficiencies are theoretically higher, and no wavelength shift occurs.
There have been recent reports of non-polar LEDs [REF 2, 3].
However, the output powers and efficiencies are well below that of c-plane LEDs.
The main reason for this poor performance is commonly attributed to high dislocation densities.
Current non-polar GaN optical devices have not achieved the performance standards necessary for bringing them to market.
The highest power m-plane LED reported is 1.79 mW at 20 mA [REF 3], and there has been no report of an electrically pumped LD grown on m-plane GaN.
Optical devices grown on m-plane GaN have the benefit of emitting polarized light [REF 4].
This lends them well to the application of backlighting for displays, especially LCDs (liquid crystal displays), since a light polarizer would not be required.
Thus, there is a need in the art for improved methods of fabricating of high performance non-polar III-nitride optical devices.
The present invention satisfies this need.

Scope of claims [claim1]
1. A method for fabricating a non-polar III-nitride Light Emitting Diode (LED), comprising: (a) growing an n-type III-nitride layer on a non-polar III-nitride substrate or template;
(b) growing an active region including a quantum well structure on the n-type III-nitride layer, wherein a non-polar quantum well in the quantum well structure is grown at a quantum well growth temperature; and
(c) growing a non-polar p-type III-nitride layer on the active region at a temperature less than 150 deg. C. more than the quantum well growth temperature.
[claim2]
2. The method of claim 1, wherein the non-polar III-nitride substrate or template is a bulk non-polar III-nitride grown by an ammonothermal method.
[claim3]
3. The method of claim 1, wherein the non-polar III-nitride substrate or template is a non-polar sidewall lateral epitaxial overgrowth (SLEO) template grown by metalorganic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE).
[claim4]
4. The method of claim 1, wherein the non-polar quantum well in the quantum well structure is grown to be approximately 8 to 12 nanometers thick.
[claim5]
5. The method of claim 1, wherein quantum well structure is grown at temperatures ranging from approximately 845 deg. C. to 890 deg. C.
[claim6]
6. The method of claim 1, wherein quantum barriers in the quantum well structure are grown to be approximately 10 to 18 nanometers thick.
[claim7]
7. The method of claim 1, wherein quantum barriers in the quantum well structure are grown at temperatures ranging from approximately 915 deg. C. to 940 deg. C.
[claim8]
8. The method of claim 1, wherein the p-type III-nitride layer is grown at a quantum barrier growth temperature.
[claim9]
9. The method of claim 1, further comprising depositing transparent oxide electrodes on the device.
[claim10]
10. The method of claim 9, wherein the electrodes are comprised of indium-tin-oxide (ITO) or zinc oxide (ZnO).
[claim11]
11. An optoelectronic device fabricated using the method of claim 1.
[claim12]
12. A non-polar III-nitride Light Emitting Diode (LED) device, comprising: (a) an n-type III-nitride layer grown on a non-polar III-nitride substrate or template;
(b) an active region including a non-polar quantum well structure grown on the n-type III-nitride layer;
(c) a non-polar p-type III-nitride layer grown on the active region; and
(d) the LED having an external quantum efficiency (EQE) of at least 35%, and an output power of at least 25 mW at a drive current of 20 mA.
[claim13]
13. The device of claim 12, wherein the non-polar III-nitride substrate or template is a bulk non-polar III-nitride grown by an ammonothermal method.
[claim14]
14. The device of claim 12, wherein the non-polar III-nitride substrate or template is a non-polar sidewall lateral epitaxial overgrowth (SLEO) template grown by metalorganic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE).
[claim15]
15. The device of claim 12, wherein a quantum well in the quantum well structure is grown to be approximately 8 to 12 nanometers thick.
[claim16]
16. The device of claim 12, wherein quantum well structure is grown at temperatures ranging from approximately 845 deg. C. to 890 deg. C.
[claim17]
17. The device of claim 12, wherein quantum barriers in the quantum well structure are grown to be approximately 10 to 18 nanometers thick.
[claim18]
18. The device of claim 12, wherein quantum barriers in the quantum well structure are grown at temperatures ranging from approximately 915 deg. C. to 940 deg. C.
[claim19]
19. The device of claim 12, wherein the p-type III-nitride layer is grown at a quantum barrier growth temperature.
[claim20]
20. The device of claim 12, further comprising transparent oxide electrodes deposited on the device.
[claim21]
21. The device of claim 20, wherein the electrodes are comprised of indium-tin-oxide (ITO) or zinc oxide (ZnO).
[claim22]
22. The method of claim 1, wherein the p-type III-nitride layer is a layer grown at a temperature at which quantum well barriers in the active region are grown.
[claim23]
23. The method of claim 1, wherein the LED has an external quantum efficiency (EQE) of at least 35%.
[claim24]
24. The method of claim 23, wherein the output power is at least 25 mW at a drive current of 20 mA.
[claim25]
25. The method of claim 1, wherein the non-polar III-nitride substrate or template is a bulk non-polar III-nitride grown by hydride vapor phase epitaxy (HVPE).
[claim26]
26. The device of claim 1, wherein the non-polar III-nitride substrate or template is a bulk non-polar III-nitride grown by hydride vapor phase epitaxy (HVPE).
[claim27]
27. The method of claim 1, wherein the n-type III-nitride layer is grown on an m-plane of the non-polar III-nitride substrate or template and the active region is grown on an m-plane of the n-type III-nitride layer.
[claim28]
28. The device of claim 12, wherein the n-type III-nitride layer is grown on an m-plane of the non-polar III-nitride substrate or template and the active region is grown on an m-plane of the n-type III-nitride layer.
  • Inventor, and Inventor/Applicant
  • SCHMIDT MATHEW C
  • KIM KWANG-CHOONG
  • SATO HITOSHI
  • DENBAARS STEVEN P
  • SPECK JAMES S
  • NAKAMURA SHUJI
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) ERATO NAKAMURA Inhomogeneous Crystal AREA
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