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Spin transistor based on the spin-filter effect, and non-volatile memory using spin transistors

Foreign code F110005376
File No. K02003US2
Posted date Sep 5, 2011
Country United States of America
Application number 97922107
Gazette No. 20080061336
Gazette No. 7671433
Date of filing Oct 31, 2007
Gazette Date Mar 13, 2008
Gazette Date Mar 2, 2010
International application number JP2003009438
International publication number WO2004012272
Date of international filing Jul 25, 2003
Date of international publication Feb 5, 2004
Priority data
  • P2002-217336 (Jul 25, 2002) JP
  • P2003-086145 (Mar 26, 2003) JP
  • 2003WO-JP09438 (Jul 25, 2003) WO
  • 2005US-10522241 (Oct 5, 2005) US
Title Spin transistor based on the spin-filter effect, and non-volatile memory using spin transistors
Abstract (US7671433)
A spin transistor comprises a spin injector for injecting, from a first nonmagnetic electrode carriers with a spin parallel to a spin band forming the band edge of a first ferromagnetic barrier layer, to a second nonmagnetic electrode layer, as hot carriers.
It also comprises a spin analyzer whereby, due to spin-splitting at the band edge of a second ferromagnetic barrier layer, the spin-polarized hot carriers are transported to a third nonmagnetic electrode when the direction of the spin of the carriers injected into the second nonmagnetic electrode is parallel to that of the spin of the spin band at the band edge of the second ferromagnetic barrier layer, whereas the hot carriers are not transported to the third nonmagnetic electrode in the case of antiparallel spin.
A memory element is also provided that comprises such a spin transistor.
Scope of claims [claim1]
1. A transistor comprising: a ferromagnetic semiconductor layer including a channel;
a source and a drain being joined to said channel; and
a gate electrode formed over said channel,
wherein at least one of said source and said drain is formed by a Schottky junction of a ferromagnetic metal and said ferromagnetic semiconductor layer,
wherein at least one of said source and said drain is formed of a ferromagnetic material, and
one of said channel and said at least one of said source and said drain has coercivity higher than coercivity of the other of said channel and said at least one of said source and said drain.
[claim2]
2. The transistor according to claim 1, wherein the ferromagnetic material used in at least one of said source and said drain is a ferromagnetic metal or a ferromagnetic semiconductor.
[claim3]
3. The transistor according to claim 1, comprising a gate insulating layer disposed between said ferromagnetic semiconductor layer and said gate electrode.
[claim4]
4. The transistor according to claim 1, wherein a magnitude of mutual conductance or an output current is controlled by relative magnetization directions of said source or said drain and said ferromagnetic semiconductor material.
[claim5]
5. A memory element comprising: one transistor according to claim 1;
a first line connected to said source;
a second line connected to said gate; and
a third line connected to said drain.
  • Inventor, and Inventor/Applicant
  • SUGAHARA SATOSHI
  • TANAKA MASAAKI
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) PRESTO Nanostructure and Material Property AREA
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