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Signal reproducing device

Foreign code F110005409
File No. K03101WO
Posted date Sep 5, 2011
Country United States of America
Application number 92009108
Gazette No. 20110050332
Gazette No. 8314646
Date of filing Sep 2, 2008
Gazette Date Mar 3, 2011
Gazette Date Nov 20, 2012
International application number JP2008065758
International publication number WO2009107263
Date of international filing Sep 2, 2008
Date of international publication Sep 3, 2009
Priority data
  • P2008-050389 (Feb 29, 2008) JP
  • 2008WO-JP65758 (Sep 2, 2008) WO
Title Signal reproducing device
Abstract (US8314646)
The purpose is to detect minute electrical signals embedded in noise with a simple device configuration and easily reduce the area of the device by utilizing a semiconductor device in particular.
This signal reproducing device (1) includes: N FETs (61 to 6N) each receiving a common input signal (VIN) at a gate terminal and having a bias voltage (VDD) applied to a drain terminal; and an adder circuit (4) connected to source terminals of the FETs (61 to 6N), for combining currents between the drain terminals and the source terminals of the FETs (61 to 6N) and outputting the resulting current, wherein the FETs (61 to 6N) and the bias voltage (VDD) are set so that a voltage at the gate terminal having the common input signal (VIN) applied thereto falls within a subthreshold region of voltages less than a threshold voltage of the FETs (61 to 6N).
Scope of claims [claim1]
1. A signal reproducing device comprising: a plurality of semiconductor field-effect transistors each receiving a common input signal at a gate terminal and having a bias voltage applied to a drain terminal;
an adder circuit connected to source terminals of the plurality of semiconductor field-effect transistors for adding currents between the drain terminals and the source terminals of the plurality of semiconductor field-effect transistors and outputting the resulting current; and
a noise source connected to at least one of the drain terminal and the source terminal for adding noise to the bias voltage,
wherein the plurality of semiconductor field-effect transistors and the bias voltage are set so that a voltage at the gate terminal having the common input signal applied thereto falls within a subthreshold region of voltages less than a threshold voltage of the plurality of semiconductor field-effect transistors.
[claim2]
2. The signal reproducing device of claim 1 further comprising: a noise source connected to the gate terminal for adding noise to the input signal.
[claim3]
3. The signal reproducing device of claim 1 further comprising: a voltage source circuit that adds an offset to the input signal so that the voltage at the gate terminal falls within the subthreshold region.
  • Inventor, and Inventor/Applicant
  • KASAI SEIYA
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
IPC(International Patent Classification)
Reference ( R and D project ) PRESTO Materials and processes for innovative next-generation devices AREA
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