Top > Search of International Patents > FAULT DETECTION SYSTEM, EXTRACTION DEVICE, FAULT DETECTION METHOD, PROGRAM, AND RECORDING MEDIUM

FAULT DETECTION SYSTEM, EXTRACTION DEVICE, FAULT DETECTION METHOD, PROGRAM, AND RECORDING MEDIUM meetings achieved

Foreign code F120006613
File No. S2010-1279
Posted date May 16, 2012
Country WIPO
International application number 2011JP072211
International publication number WO 2012/046602
Date of international filing Sep 28, 2011
Date of international publication Apr 12, 2012
Priority data
  • P2010-225318 (Oct 5, 2010) JP
Title FAULT DETECTION SYSTEM, EXTRACTION DEVICE, FAULT DETECTION METHOD, PROGRAM, AND RECORDING MEDIUM meetings achieved
Abstract An objective of the present invention is to provide a fault detection system which improves fault detection efficiency while reducing the number of test patterns inputted into a logic circuit. A fault detection system which detects faults in logic circuits on the basis of a plurality of outputted logic values which are outputted from a logic circuit wherein a test input pattern is inputted is a system wherein a plurality of outputted logic values are inputted as into the logic circuit as a new test input pattern, said system comprising: a first extraction means for extracting all or part of the plurality of outputted logic values; a comparison means for comparing the outputted logic values which the first extraction means extracts with either outputted logic values which are predicted in the event that the logic circuit has no faults or outputted logic values which are predicted in the event that the logic circuit has specific faults; and a fault adjudication means for adjudicating the presence or absence of faults in the logic circuit on the basis of the result of the comparison by the comparison means.
  • Applicant
  • ※All designated countries except for US in the data before July 2012
  • Kyushu Institute of Technology
  • Inventor
  • SATO Yasuo
  • KAJIHARA Seiji
IPC(International Patent Classification)
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