NANODEVICE AND MANUFACTURING METHOD FOR SAME

• 特願2012-042588 (2012.2.28) JP

Provided are: a nanodevice which is combined with electronic devices such as a diode, a tunnel element and a MOS transistor

an integrated circuit

and a nanodevice manufacturing method. The nanodevice is provided with: a first insulating layer (2)

one electrode (5A) and another electrode (5B) that are provided so as to comprise a nanogap on the first insulating layer (2)

a metal nanoparticle (7) or a functional molecule that is placed between the one electrode (5A) and the other electrode (5B)

and a second insulating layer (8) that is provided on the first insulating layer (2), the one electrode (5A) and the other electrode (5B), and that buries either the metal nanoparticle (7) or the functional molecule. The second insulating layer (8) functions as a passivation layer.

• JAPAN SCIENCE AND TECHNOLOGY AGENCY,
• MAJIMA YUTAKA,
• TERANISHI TOSHIHARU,
• MATSUMOTO KAZUHIKO,
• MAEHASHI KENZO,
• AZUMA YASUO,
• OHNO YASUHIDE,
• MAEDA KOSUKE,
• GUILLAUME HUBERT FREDERIC HACKENBERGER

• MAJIMA YUTAKA,
• TERANISHI TOSHIHARU,
• MATSUMOTO KAZUHIKO,
• MAEHASHI KENZO,
• AZUMA YASUO,
• OHNO YASUHIDE,
• MAEDA KOSUKE,
• GUILLAUME HUBERT FREDERIC HACKENBERGER

• H01L  29/786     薄膜トランジスタ
• H01L  21/336     絶縁ゲートを有するもの
• H01L  21/8234    ＭＩＳ技術
• H01L  27/088     構成部品が絶縁ゲートを有する電界効果トランジスタであるもの
• H01L  29/06      半導体本体の形状に特徴のあるもの；半導体領域の形状，相対的な大きさまたは配列に特徴のあるもの
• H01L  29/66      半導体装置の型
• H01L  51/05      整流，増幅，発振またはスイッチングに特に適用されるものであり，少なくとも１つの電位障壁または表面障壁を有するもの；少なくとも１つの電位障壁または表面障壁を有するコンデンサーまたは抵抗器
• H01L  51/30      材料の選択