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TUNNEL FIELD EFFECT TRANSISTOR

外国特許コード F170009058
整理番号 K10103WO/S2015-2125-N0
掲載日 2017年4月26日
出願国 世界知的所有権機関(WIPO)
国際出願番号 2016JP078393
国際公開番号 WO 2017057329
国際出願日 平成28年9月27日(2016.9.27)
国際公開日 平成29年4月6日(2017.4.6)
優先権データ
  • 特願2015-193196 (2015.9.30) JP
発明の名称 (英語) TUNNEL FIELD EFFECT TRANSISTOR
発明の概要(英語) The tunnel field effect transistor according to the present invention has: a channel; a source electrode connected directly or indirectly to one end of the channel; a drain electrode connected directly or indirectly to the other end of the channel; and a gate electrode for causing an electric field to act on the channel, generating a tunnel phenomenon at the source electrode-side joint part of the channel, and simultaneously generating a two-dimensional electron gas in the channel.
従来技術、競合技術の概要(英語) BACKGROUND ART
A microprocessor and a semiconductor integrated circuit is high, the metal - semiconductor (MOS) field effect transistor - oxide film (FET) devices such as integrated on the semiconductor substrate is manufactured. In general, a complementary MOSFET (CMOS) integrated circuits (switch elements) becomes a basic element. The material of the semiconductor substrate, a Group IV silicon semiconductor is mainly used. CMOS transistors that constitute the downsizing, a microprocessor and a high degree of integration of semiconductor integrated circuit can be improved and performance. When the size of the CMOS is one of the problems, is an increase in power consumption. An increase in power consumption is a major cause of, the microchip 1 can be mounted on one of an increase in the number of the CMOS, and short channel effect of the leakage current is increased by one 2 and the like. Among these, increase of leak current, resulting in an increase of the supply voltage. Therefore, for each of the CMOS, to suppress the leakage current, it is necessary to reduce the drive voltage.
As an index indicating the characteristics of the CMOS switch, the subthreshold coefficient (mV/digit) is used. In the subthreshold coefficient is, the ON state for MOSFET corresponding to the minimum drive voltage. A conventional MOSFET switch characteristics, and electrons and positive holes (carrier) based on the diffusion phenomenon. Therefore, in the conventional MOSFET, the subthreshold coefficient of the theoretical minimum value of the order 60mV /, smaller than the sub-threshold characteristics of the switch could not be realized.
The physical theoretical limit is exceeded, the operation in the subthreshold coefficient is smaller than the switch element, a tunnel field effect transistor (TFET) have been reported. A tunnel field effect transistor, no short channel effect, and a high ON/OFF ratio can be realized at a low voltage, the switch element of the next generation are considered to be promising candidates. In recent years, III-V group compound semiconductor nanowire tunnel field effect transistor is used has been reported (for example, see Non-Patent Document 1).
Is in Non-Patent Document 1, p-type (111) silicon substrate and, on the surface of the (111) silicon substrate in a direction normal to the substrate surface disposed along and InAs nanowires, and a source electrode connected to the silicon substrate, InAs nanowire connected to the drain electrode, the interface between the silicon substrate and the InAs nanowires can have an effect on the position of the tunnel field effect transistor having a gate electrode is described. The tunnel field effect transistor, the subthreshold coefficient (60mV/order or less) in a small operational have been reported.
  • 出願人(英語)
  • ※2012年7月以前掲載分については米国以外のすべての指定国
  • NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
  • 発明者(英語)
  • FUKUI, Takashi
  • TOMIOKA, Katsuhiro
国際特許分類(IPC)
指定国 National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DJ DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JP KE KG KN KP KR KW KZ LA LC LK LR LS LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN ST TD TG
参考情報 (研究プロジェクト等) PRESTO Phase Interfaces for Highly Efficient Energy Utilization AREA
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