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CHARACTERISTIC AMOUNT CONVERSION MODULE, PATTERN IDENTIFICATION DEVICE, PATTERN IDENTIFICATION METHOD, AND PROGRAM

外国特許コード F170009161
整理番号 (S2016-0420-N0)
掲載日 2017年9月6日
出願国 世界知的所有権機関(WIPO)
国際出願番号 2017JP005600
国際公開番号 WO 2017141997
国際出願日 平成29年2月15日(2017.2.15)
国際公開日 平成29年8月24日(2017.8.24)
優先権データ
  • 特願2016-025892 (2016.2.15) JP
発明の名称 (英語) CHARACTERISTIC AMOUNT CONVERSION MODULE, PATTERN IDENTIFICATION DEVICE, PATTERN IDENTIFICATION METHOD, AND PROGRAM
発明の概要(英語) A characteristic amount conversion module (characteristic amount conversion means) (500) to which the present invention is applied is equipped with: a learning data input unit (510); an intermediate layer setting unit (520), which inputs learning data that has been input to the learning data input unit into a learning model configured from a function comprising a formula having, as factors, a weighting and a bias having a second dimensional number satisfying an optical calculation constraint condition, and which sets an intermediate layer having the second dimensional number; an output calculation unit (530); an error calculation unit (540); a determination unit (550); a weighting bias changing unit (560); a learning model output unit (570); and a control unit (580).
従来技術、競合技術の概要(英語) BACKGROUND ART
In recent years, new knowledge from the group consisting of a large-scale data, for the purpose of obtaining knowledge research and development attention. Machine learning in computer vision, learning by construction of a two-dimensional image from the object recognition, matching, realizing easy detection. Object recognition, matching, in order to improve the detection accuracy, and vast amounts of data for learning a good quality of high-speed processing technique for learning and the group is needed, a general purpose processor operating frequency is obtained. However, due to miniaturization of semiconductor manufacturing such as heat generation of the processes of the problem, further improvement of the operating frequency of a general-purpose processor is difficult. Therefore, the processor core or arithmetic unit in parallel and improve the performance of the learning technique, such as a dedicated processor and each portion is good, the conventional technique of efficiently combining the new computing technologies and fusion system and research and development.
For example, the multidimensional vector to a high speed as an inner product operation, and the light operation processing (see Non-Patent Document 1). The processing of the light is a lack of versatility, in a specific algorithm, and the analog characteristic of the parallel high-speed operation, large-capacity information stored in the high beam. Patent Document 1 and Non-Patent Document 1 for example is, as described above and a parallel high-speed operation and large-capacity storage of information capable of realizing both the holographic optical disk using the optical correlation system is disclosed.
  • 出願人(英語)
  • ※2012年7月以前掲載分については米国以外のすべての指定国
  • THE UNIVERSITY OF ELECTRO-COMMUNICATIONS
  • 発明者(英語)
  • WATANABE Eriko
  • FUJIYOSHI Hironobu
  • TANIGUCHI Yasufumi
  • IKEDA Kanami
  • WAKITA Suguru
  • SUZUKI Hidenori
国際特許分類(IPC)
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