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COMPOUND SEMICONDUCTOR, METHOD FOR MANUFACTURING SAME, AND NITRIDE SEMICONDUCTOR

Foreign code F180009404
File No. AE06-01WO
Posted date Apr 20, 2018
Country WIPO
International application number 2017JP020513
International publication number WO 2018042792
Date of international filing Jun 1, 2017
Date of international publication Mar 8, 2018
Priority data
  • P2016-169994 (Aug 31, 2016) JP
Title COMPOUND SEMICONDUCTOR, METHOD FOR MANUFACTURING SAME, AND NITRIDE SEMICONDUCTOR
Abstract This compound semiconductor constitutes a high-performance semiconductor device by having a high electron concentration of 5×1019 cm-3 or more, and exhibiting an electron mobility of 46 cm2/V∙s or more, and low electrical resistance. The present invention provides an n conductivity-type group 13 nitride semiconductor that can be film-formed at a temperature within a range from a room temperature to 700°C on a substrate having a large area.
Outline of related art and contending technology BACKGROUND ART
Such as GaN or InN device 13 using the group III nitride semiconductor have been widely used. Conventionally, such a 13 of the group III nitride semiconductor crystal growth, MOCVD method or MBE method is used. However, the temperature of the MOCVD method is more than 1000°C is required in processes. Of the compound semiconductor at a low temperature MBE method can be formed, the film forming area can be a limit on the high and the production cost is not directed to mass production.
In addition, in the MBE method, a high concentration of donor is added, the crystal structure generated in a forbidden band in the vicinity of the conduction band of the high-concentration donor level due to the absorption is generated. Therefore, the compound semiconductor film is a problem that decreases the transparency of (non-patent document 1). For this reason, the production of a compound semiconductor, a nitride semiconductor is mainly a practical production, the MOCVD method is used.
Current, high breakdown voltage with low on-resistance of the next generation having the characteristics of the electronic device is demanded. For this purpose, a ternary 2, ternary 3 or ternary compound semiconductor 4, more specifically, the group III nitride compound semiconductor 13 for realizing a semiconductor device is demanded. For this purpose, the compound semiconductor crystal of high quality and further, a doping technique of the refinement is obtained. In particular, GaN is formed on the substrate in the vertical type power device, the carbon concentration of the n-type drift layer and the reduction, there is an urgent need to improve the electron mobility. The following prior art documents can be increased.
Is Patent Document 1, copper metal nitride buffer layer on the substrate, the semiconductor layer is provided with a semiconductor element is disclosed.
Patent Document 2 is, in a thickness of 10-100μm, sintered polymer, heat-resistant flexible graphite substrate provided on the buffer layer and the HfN, GaN buffer layer provided on the semiconductor substrate and a semiconductor layer of the disclosed embodiments. In addition, in Patent Document 3, the group III-V substrate of ZnO compound semiconductor is epitaxially grown by a method of manufacturing.
Non-Patent Document 1 is related to the P-type GaN semiconductor layer is formed as disclosed in the research. Non-Patent Document 2 is the contact resistance of the P-type GaN semiconductor layer has been disclosed in related research. Is the non-patent document 3, the low doping concentration of the nitride semiconductor to a technique disclosed in the research. Is the non-patent document 4, a high electric field of electrons for the transport model of the research are disclosed. Is the non-patent document 5, the carrier mobility in the GaN of the model of the research are disclosed. Is the non-patent document 6, PSD P-type GaN were formed by the contact resistance with respect to the evaluation-related research disclosed. Is the non-patent document 7, the LED is formed on the glass in the experiment example has been disclosed. Is the non-patent document 8, using the PSD method for the growth of a nitride single crystal has been disclosed in the research.
Scope of claims (In Japanese)[請求項1]
窒素と13族元素であるB、Al、GaまたはInからなる群より選ばれる一つの元素を含有する2元系、3元系または4元系の化合物半導体であって、
1×1017cm-3以上の酸素を不純物として含有し、
5×1019cm-3以上の電子濃度を有し、N型導電性であり、
電子移動度が46cm2/V・s以上である化合物半導体。
[請求項2]
GaとNを主成分とする請求項1に記載の化合物半導体。
[請求項3]
405nmの波長領域の光に対する吸光係数が2000cm-1以下である請求項2に記載の化合物半導体。
[請求項4]
450nmの波長領域の光に対する吸光係数が1000cm-1以下である請求項2に記載の化合物半導体。
[請求項5]
AFMによる表面粗さ測定で得られるRMS値が5.0nm以下である請求項1~4のいずれか1項に記載の化合物半導体。
[請求項6]
N型オーミック電極金属に対するコンタクト抵抗が1×10-4Ωcm-2以下である請求項1~5のいずれか1項に記載の化合物半導体。
[請求項7]
前記13族元素としてGaを含み、さらにAl及び/またはInを含有する請求項1~6のいずれか1項に記載の化合物半導体。
[請求項8]
Siをドナーとして含有する請求項1~7のいずれか1項に記載の化合物半導体。
[請求項9]
Geをドナーとして含有する請求項1~7のいずれか1項に記載の化合物半導体。
[請求項10]
請求項1~9のいずれか1項に記載の化合物半導体が用いられた導電部と電極とが接続されてなるコンタクト構造。
[請求項11]
請求項10に記載のコンタクト構造が備えられた半導体素子。
[請求項12]
請求項1~9のいずれか1項に記載の化合物半導体が用いられた透明電極。
[請求項13]
パルススパッタリング法を用いて、酸素を含むプロセス雰囲気で請求項1~9のいずれか1項に記載の化合物半導体を成膜する化合物半導体の製造方法。
[請求項14]
請求項13の化合物半導体の製造方法において、成膜時の基板温度を700℃以下で行う化合物半導体の製造方法。
[請求項15]
窒素と、B、Al、GaまたはInからなる群より選ばれる少なくとも1種の13族元素を含有する、導電型がn型の窒化物半導体であって、
電子濃度が1×1020cm-3以上で、且つ、比抵抗が0.3×10-3Ω・cm以下である、窒化物半導体。
[請求項16]
前記電子濃度が2×1020cm-3以上である、請求項15に記載の窒化物半導体。
[請求項17]
n型オーミック電極金属に対するコンタクト抵抗が1×10-4Ωcm-2以下である、請求項15または16に記載の窒化物半導体。
[請求項18]
酸素不純物を1×1017cm-3以上含有する、請求項15~17の何れか1項に記載の窒化物半導体。
[請求項19]
405nmの波長領域の光に対する吸光係数が2000cm-1以下である、請求項18に記載の窒化物半導体。
[請求項20]
450nmの波長領域の光に対する吸光係数が1000cm-1以下である、請求項18に記載の窒化物半導体。
[請求項21]
AFMによる表面粗さ測定で得られるRMS値が5.0nm以下である、請求項15~20の何れか1項に記載の窒化物半導体。
[請求項22]
前記少なくとも1種の13族元素はGaである、請求項15~21の何れか1項に記載の窒化物半導体。
[請求項23]
前記窒化物半導体は、SiまたはGeの何れか若しくは双方をドナー不純物として含有している、請求項15~22の何れか1項に記載の窒化物半導体。
[請求項24]
比抵抗が0.2×10-3Ω・cm以上である、請求項15~23の何れか1項に記載の窒化物半導体。
[請求項25]
比抵抗が0.15×10-3Ω・cm以上である、請求項15~23の何れか1項に記載の窒化物半導体。
[請求項26]
比抵抗が0.1×10-3Ω・cm以上である、請求項15~23の何れか1項に記載の窒化物半導体。
[請求項27]
(a)電子濃度が1×1020cm-3、且つ、比抵抗が0.3×10-3Ω・cm、
(b)電子濃度が3×1020cm-3、且つ、比抵抗が0.3×10-3Ω・cm、
(c)電子濃度が4×1020cm-3、且つ、比抵抗が0.15×10-3Ω・cm、
及び(d)電子濃度が9×1020cm-3、且つ、比抵抗が0.15×10-3Ω・cmの4点で囲まれた数値範囲を満たす請求項15~24の何れか1項に記載の窒化物半導体。
[請求項28]
請求項18~27の何れか1項に記載の窒化物半導体を導電部として備えた、コンタクト構造。
[請求項29]
請求項18~27の何れか1項に記載の窒化物半導体を電極部として備えた、コンタクト構造。
[請求項30]
請求項28または29に記載のコンタクト構造を備えた、半導体素子。
  • Applicant
  • ※All designated countries except for US in the data before July 2012
  • JAPAN SCIENCE AND TECHNOLOGY AGENCY
  • Inventor
  • FUJIOKA Hiroshi
  • UENO Kohei
IPC(International Patent Classification)
Specified countries National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DJ DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JP KE KG KH KN KP KR KW KZ LA LC LK LR LS LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN ST TD TG
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