Top > Search of International Patents > GATE DRIVE CIRCUIT CAPABLE OF HIGH-SPEED SWITCHING

GATE DRIVE CIRCUIT CAPABLE OF HIGH-SPEED SWITCHING meetings

Foreign code F190009743
File No. (S2017-0887-N0,内0517)
Posted date May 7, 2019
Country WIPO
International application number 2018JP025269
International publication number WO 2019013054
Date of international filing Jul 3, 2018
Date of international publication Jan 17, 2019
Priority data
  • P2017-135683 (Jul 11, 2017) JP
Title GATE DRIVE CIRCUIT CAPABLE OF HIGH-SPEED SWITCHING meetings
Abstract This gate drive circuit (1) for driving a gate of a power switching element (PS) is provided with: an inductor (L1); a first switch (Q1) which is arranged between one end of the inductor (L1) and a power supply potential (VDD); a second switch (Q2) which is arranged between the other end of the inductor (L1) and the ground potential; a first diode (D1), the cathode of which is connected to a first connection node (C1) of the first switch (Q1) and the inductor (L1); and a second diode (D2), the anode of which is connected to a second connection node (C2) of the second switch (Q2) and the inductor (L1). The anode of the first diode (D1) and the cathode of the second diode (D2) are connected to each other; and the gate is connected to a third connection node (C3) of the anode of the first diode (D1) and the cathode of the second diode (D2).
Outline of related art and contending technology BACKGROUND ART
The electrical energy in high power pulse applications is large is located in the art, such as FET or IGBT power of the voltage-driven-type power semiconductor switching element for controlling the driving energy, many control circuit has been proposed. Such a drive, the control circuit, the power semiconductor switching element for applying on-voltage to the gate of the driving circuit is turned on, turned off for the off-voltage is applied and a driving circuit, the power semiconductor switching element is turned on, turned off and control is generally used.
Of the driving, control circuit and a high power efficiency, power semiconductor switching element is not damaged, and, to the peripheral device and the target device in order to prevent any adverse effect, the time of switching of the power semiconductor switching element to reduce the electromagnetic noise generated has been desired. As one of the methods, the power semiconductor switching element to the gate of the power semiconductor switching element connected to the resistance of the gate current flowing, during the time period required for turning on or off to finely adjust the known method (for example, Non-Patent Document 1).
Is the non-patent document 1, the circuit shown in Fig. 10 are described. In Fig. 10, two switches 2 Q11 connected in series, provided by the gate driving circuit 10 Q12, SiC-MOSFET PS is configured to drive the gate of the power switching element. To the gate of the power switching element PS, gate resistance RG is connected, switch Q11, the on/off control Q12, the gate current is adjusted. In this case, PS is a power switching element, the internal resistance of the gate/source capacitance Ciss between the gate and this causes due to the presence, the switching is governed by these. For example, as a power switching element PS, SiC-MOSFET manufactured by Rohm Corporation (type name: SCT2450KE) is used, the internal resistance is 25 Ω, in the internal volume 463pF. Therefore, the power switching element for charging the gate voltage of the PS is 95%, about 35ns time-consuming.
In addition, the power switching element PS of the switching operation, the internal capacitance Ciss of the electric circuit in the discharging and charging processes. Therefore, the gate resistance Rg is made small, the gate current of the current increases, the gate of the sub-discharge internal capacitance Ciss for the time required for the switching noise is reduced and the switching loss is increased. On the other hand, the gate resistance Rg is increased, switching noise tends to increase the switching loss is reduced.
In order to solve this problem, the gate resistance can be set to a low resistance value of the source/drain voltage rises rapidly (to a high-speed switching) by driving, the source/drain voltage reaches a predetermined value, the gate resistance is switched to a high resistance value when the driving method has been proposed. However, the driving target device is used as a voltage-driven power semiconductor switching element of the switching period is, typically, the number equal to or less than 100ns, in a very short switching period, the resistance value must be switched at good timings. Therefore, the gate resistance value variable element and a high-speed operation, high-accuracy sensor to detect a high voltage must be constructed using, the apparatus is complicated and expensive to be performed, there is no margin in the timing of a problem that it is difficult to control for, switching noise can be reduced and the reduction of switching loss trade-off relation between the it is difficult to eliminate.
On the other hand, in Non-Patent Document 2, by using inductors to the gate driving circuit, the switching element is turned on to increase the operation speed. Non-Patent Document 2 is the circuit shown in Fig. 11 have been described. In Fig. 11, a switch Q21 connected in series, Q22, and the switch Q21, inductor L21 Q22 is provided between the gate driving circuit 20 by including, in the SiC-MOSFET PS is configured to drive the gate of the power switching element. In the gate driving circuit 20, before switching the switch Q21, Q22 is turned on, the magnetic field energy stored in inductor L1, then, the gate charging current from the inductor L1. Thus, regardless of the internal resistance of the gate, a constant current is supplied to the gate, the power switching element PS of the high-speed operation can be turned on.
However, in non-patent document 2, a power switching element PS of the high-speed on-off operation cannot be performed. In addition, the excess energy stored in inductor L21 and the magnetic field, the gate of the power switching element PS is a problem that a break.
Scope of claims (In Japanese)請求の範囲 [請求項1]
 電力回路の電力用スイッチング素子のゲートを駆動するためのゲート駆動回路であって、
 インダクタと、
 前記インダクタの一端と電源電位との間に設けられた第1スイッチと、
 前記インダクタの他端と前記電源電位より低い基準電位との間に設けられた第2スイッチと、
 前記第1スイッチと前記インダクタとの第1接続ノードにカソードが接続された第1ダイオードと、
 前記第2スイッチと前記インダクタとの第2接続ノードにアノードが接続された第2ダイオードと、
 前記第1スイッチおよび前記第2スイッチの導通/非導通を制御する制御回路と、
を備え、
 前記第1ダイオードのアノードと前記第2ダイオードのカソードとが接続されており、
 前記ゲートは、前記第1ダイオードのアノードと前記第2ダイオードのカソードとの第3接続ノードに接続されている、ことを特徴とするゲート駆動回路。

[請求項2]
 前記制御回路は、
 前記電力用スイッチング素子がオフ状態では、
 前記第1スイッチおよび前記第2スイッチをそれぞれ非導通状態および導通状態に制御し、
 前記電力用スイッチング素子のターンオンの際には、
 前記第1スイッチおよび前記第2スイッチを両方とも導通状態に制御して、所定時間後、前記第2スイッチを非導通状態に制御することを特徴とする請求項1に記載のゲート駆動回路。

[請求項3]
 前記制御回路は、
 前記電力用スイッチング素子がオン状態では、
 前記第1スイッチおよび前記第2スイッチをそれぞれ導通状態および非導通状態に制御し、
 前記電力用スイッチング素子のターンオフの際には、
 前記第1スイッチおよび前記第2スイッチを両方とも導通状態に制御して、所定時間後、前記第1スイッチを非導通状態に制御することを特徴とする請求項1または2に記載のゲート駆動回路。

[請求項4]
 前記基準電位は接地電位であることを特徴とする請求項1~3のいずれかに記載のゲート駆動回路。

  • Applicant
  • ※All designated countries except for US in the data before July 2012
  • KYOTO INSTITUTE OF TECHNOLOGY
  • Inventor
  • KOBAYASHI, Kazutoshi
  • FURUTA, Jun
  • INAMORI, Sho
IPC(International Patent Classification)
Specified countries National States: AE AG AL AM AO AT AU AZ BA BB BG BH BN BR BW BY BZ CA CH CL CN CO CR CU CZ DE DJ DK DM DO DZ EC EE EG ES FI GB GD GE GH GM GT HN HR HU ID IL IN IR IS JO JP KE KG KH KN KP KR KW KZ LA LC LK LR LS LU LY MA MD ME MG MK MN MW MX MY MZ NA NG NI NO NZ OM PA PE PG PH PL PT QA RO RS RU RW SA SC SD SE SG SK SL SM ST SV SY TH TJ TM TN TR TT TZ UA UG US UZ VC VN ZA ZM ZW
ARIPO: BW GH GM KE LR LS MW MZ NA RW SD SL SZ TZ UG ZM ZW
EAPO: AM AZ BY KG KZ RU TJ TM
EPO: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
OAPI: BF BJ CF CG CI CM GA GN GQ GW KM ML MR NE SN ST TD TG
Please contact us by E-mail or facsimile if you have any interests on this patent

PAGE TOP

close
close
close
close
close
close