|発明の名称||SAMPLE AND HOLD CIRCUIT|
PROBLEM TO BE SOLVED: To provide a switched current sample and hold circuit of low power consumption by using two complementary memory cells and a polarity discriminator for discriminating the polarity of input currents.
SOLUTION: The circuit of this invention comprises two complementary memory cells of an n-type memory cell having an nMOS transistor and a switch, and a p-type memory cell having a pMOS transistor and a switch, each memory cell being a sample and hold circuit based on switched current technology, and the polarity discriminator for discriminating the polarity of the input current. This circuit discriminates the polarity of the input current by the polarity discriminator, and according to the result, the circuit performs sample and hold operation by using only one of the memory cells. Thus, the sample and hold function of low power consumption is attained in a wide range of the input current.
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