|発明の名称||LVQ NEURAL NETWORK|
PROBLEM TO BE SOLVED: To enable the mounting of an LVQ neural network on a semiconductor integrated circuit.
SOLUTION: An LVQ neural network 100A includes: a first stage circuit 10 having registers 11I, 11R holding partial vectors of an input vector and a reference vector; a second stage circuit 20 having an adder 21 for differentiating the registers from each other of the first stage circuit and a register 22I holding its value; a third stage circuit 30 having a multiplier 31 for squaring a register value of the second stage circuit and a register 32I holding its value; a fourth stage circuit 40 having an adder 41 for cumulatively adding the register value of the third stage circuit and a register 43 holding its value; and a fifth stage circuit 50 having a register 51 holding the minimum distance between the input vector and the reference vector and a comparator 52, and outputting a minimum distance detection signal in the case where the register value of the fourth stage circuit is smaller than the minimum distance. Each stage circuit performs pipeline operation.
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